linux-kernel - Re: [PATCH 05/12] riscv: implement remote sfence.i using IPIs

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Message-ID: <alpine.DEB.2.21.9999.1910311657150.25874@viisi.sifive.com>
Date:   Thu, 31 Oct 2019 16:57:45 -0700 (PDT)
From:   Paul Walmsley <paul.walmsley@...ive.com>
To:     Christoph Hellwig <hch@....de>
cc:     Palmer Dabbelt <palmer@...ive.com>,
        Damien Le Moal <damien.lemoal@....com>,
        linux-riscv@...ts.infradead.org, linux-kernel@...r.kernel.org,
        Anup Patel <anup@...infault.org>
Subject: Re: [PATCH 05/12] riscv: implement remote sfence.i using IPIs

On Mon, 28 Oct 2019, Christoph Hellwig wrote:

> The RISC-V ISA only supports flushing the instruction cache for the
> local CPU core.  Currently we always offload the remote TLB flushing to
> the SBI, which then issues an IPI under the hoods.  But with M-mode
> we do not have an SBI so we have to do it ourselves.   IPI to the
> other nodes using the existing kernel helpers instead if we have
> native clint support and thus can IPI directly from the kernel.
> 
> Signed-off-by: Christoph Hellwig <hch@....de>
> Reviewed-by: Anup Patel <anup@...infault.org>

Thanks, queued for v5.5-rc1 with a minor fix to one of the code comments.


- Paul