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Message-ID: <f203cc52-7082-5e89-e6de-9bf44dafebb3@microchip.com>
Date: Thu, 31 Oct 2019 14:26:17 +0000
From: <Tudor.Ambarus@...rochip.com>
To: <boris.brezillon@...labora.com>
CC: <miquel.raynal@...tlin.com>, <richard@....at>, <vigneshr@...com>,
<linux-mtd@...ts.infradead.org>, <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH v3 10/32] mtd: spi-nor: Pointer parameter for CR in
spi_nor_read_cr()
On 10/31/2019 12:58 PM, Boris Brezillon wrote:
> External E-Mail
>
>
> On Tue, 29 Oct 2019 11:17:04 +0000
> <Tudor.Ambarus@...rochip.com> wrote:
>
>> From: Tudor Ambarus <tudor.ambarus@...rochip.com>
>>
>> Let the callers pass the pointer to the DMA-able buffer where
>> the value of the Configuration Register will be written. This way we
>> avoid the casts between int and u8, which can be confusing.
>>
>> Callers stop compare the return value of spi_nor_read_cr() with negative,
>> spi_nor_read_cr() returns 0 on success and -errno otherwise.
>>
>> Signed-off-by: Tudor Ambarus <tudor.ambarus@...rochip.com>
>
> Reviewed-by: Boris Brezillon <boris.brezillon@...labora.com>
>
> There's just this &nor->bouncebuf[0] that I'd prefer to be turned into
> nor->bouncebuf if you're okay.
>
I used &nor->bouncebuf[0] and not nor->bouncebuf for consistency reasons, but
sure I can update this. When writing the Status Register with two bytes, it
happens that in the code I pass pointer to the second byte, so &nor->bouncebuf[1].
I'm ok with both ways, and since you signaled it, I'll change according to your
suggestion.
Thanks for reviewing the series!
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