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Message-ID: <20191031171530.GG39590@arrakis.emea.arm.com>
Date: Thu, 31 Oct 2019 17:15:30 +0000
From: Catalin Marinas <catalin.marinas@....com>
To: Julien Grall <julien.grall@....com>
Cc: linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
will@...nel.org, Suzuki K Poulose <suzuki.poulose@....com>,
"julien@....org" <julien@....org>
Subject: Re: [PATCH 4/4] docs/arm64: cpu-feature-registers: Documents missing
visible fields
On Thu, Oct 31, 2019 at 04:48:18PM +0000, Julien Grall wrote:
> On 03/10/2019 12:12, Julien Grall wrote:
> > A couple of fields visible to userspace are not described in the
> > documentation. So update it.
> >
> > Signed-off-by: Julien Grall <julien.grall@....com>
> > ---
> > Documentation/arm64/cpu-feature-registers.rst | 4 ++++
> > 1 file changed, 4 insertions(+)
> >
> > diff --git a/Documentation/arm64/cpu-feature-registers.rst b/Documentation/arm64/cpu-feature-registers.rst
> > index 2955287e9acc..ffcf4e2c71ef 100644
> > --- a/Documentation/arm64/cpu-feature-registers.rst
> > +++ b/Documentation/arm64/cpu-feature-registers.rst
> > @@ -193,6 +193,10 @@ infrastructure:
> > +------------------------------+---------+---------+
> > | Name | bits | visible |
> > +------------------------------+---------+---------+
> > + | SB | [36-39] | y |
> > + +------------------------------+---------+---------+
> > + | FRINTTS | [32-35] | y |
> > + +------------------------------+---------+---------+
>
> Will reported the bitfields were inconsistent (see [1]). Looking in more
> details, it seems that I messed up this patch when sending it (I honestly
> can't remember why I wrote like that :().
>
> @Catalin, I saw you applied this patch to for-next/elf-hwcap-docs. Would you
> mind to update the content of the patch? Or do you prefer a new version?
Please send a fix on top of the elf-hwcap-docs branch. I'd prefer not to
rebase it.
--
Catalin
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