linux-kernel - Re: [PATCH v3 3/3] mm/hmm/test: add self tests for HMM

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Message-ID: <8ed8f207-42be-8f86-1778-67fbd4f81370@nvidia.com>
Date:   Thu, 31 Oct 2019 10:48:18 -0700
From:   Ralph Campbell <rcampbell@...dia.com>
To:     Jason Gunthorpe <jgg@...lanox.com>
CC:     Jerome Glisse <jglisse@...hat.com>,
        John Hubbard <jhubbard@...dia.com>,
        Christoph Hellwig <hch@....de>,
        "linux-rdma@...r.kernel.org" <linux-rdma@...r.kernel.org>,
        "linux-mm@...ck.org" <linux-mm@...ck.org>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH v3 3/3] mm/hmm/test: add self tests for HMM


On 10/31/19 10:34 AM, Jason Gunthorpe wrote:
> On Thu, Oct 31, 2019 at 10:28:12AM -0700, Ralph Campbell wrote:
>>>>>>> It seems especially over-complicated to use a full page table layout
>>>>>>> for this, wouldn't something simple like an xarray be good enough for
>>>>>>> test purposes?
>>>>>>
>>>>>> Possibly. A page table is really just a lookup table from virtual address
>>>>>> to pfn/page. Part of the rationale was to mimic what a real device
>>>>>> might do.
>>>>>
>>>>> Well, but the details of the page table layout don't see really
>>>>> important to this testing, IMHO.
>>>>
>>>> One problem with XArray is that on 32-bit machines the value would
>>>> need to be u64 to hold a pfn which won't fit in a ULONG_MAX.
>>>> I guess we could make the driver 64-bit only.
>>>
>>> Why would a 32 bit machine need a 64 bit pfn?
>>>
>>
>> On x86, Physical Address Extension (PAE) uses a 64 bit PTE.
>> See arch/x86/include/asm/pgtable_32_types.h which includes
>> arch/x86/include/asm/pgtable-3level_types.h.
> 
> That is the content of the PTE, not the address of the PTE. In this
> case the xarray index is the 'virtual' address of the fictional device
> and it can easily be 32 bits with no problem
> 
> Jason
> 

Oh, I see. You mean use a 32-bit user virtual address for the index
and store a pointer to the 64-bit PTE which of course would be
32 bit. That should work.
I was stuck on thinking the PTE needed to be stored.