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Message-ID: <CAMuHMdXr7_HP5NUQ_0D76N-eBuootQqyPusqmf6nyDnLN__ORA@mail.gmail.com>
Date:   Fri, 1 Nov 2019 11:08:07 +0100
From:   Geert Uytterhoeven <geert@...ux-m68k.org>
To:     Krzysztof Kozlowski <krzk@...nel.org>
Cc:     Rob Herring <robh+dt@...nel.org>,
        Mark Rutland <mark.rutland@....com>,
        Maxime Ripard <mripard@...nel.org>,
        Chen-Yu Tsai <wens@...e.org>, Heiko Stuebner <heiko@...ech.de>,
        "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" 
        <devicetree@...r.kernel.org>,
        Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
        Linux ARM <linux-arm-kernel@...ts.infradead.org>,
        "open list:ARM/Rockchip SoC..." <linux-rockchip@...ts.infradead.org>
Subject: Re: [PATCH v4 4/7] dt-bindings: sram: Merge Renesas SRAM bindings
 into generic

Hi Krzysztof,

On Mon, Oct 21, 2019 at 6:15 PM Krzysztof Kozlowski <krzk@...nel.org> wrote:
> The Renesas SRAM bindings list only compatible so integrate them into
> generic SRAM bindings schema.
>
> Signed-off-by: Krzysztof Kozlowski <krzk@...nel.org>

Thanks for your patch, whcih is now commit 0759b09eadd0d9a1 ("dt-bindings:
sram: Merge Renesas SRAM bindings into generic") in Rob's for-next branch.

> --- a/Documentation/devicetree/bindings/sram/renesas,smp-sram.txt
> +++ /dev/null
> @@ -1,27 +0,0 @@
> -* Renesas SMP SRAM
> -
> -Renesas R-Car Gen2 and RZ/G1 SoCs need a small piece of SRAM for the jump stub
> -for secondary CPU bringup and CPU hotplug.
> -This memory is reserved by adding a child node to a "mmio-sram" node, cfr.
> -Documentation/devicetree/bindings/sram/sram.txt.
> -
> -Required child node properties:
> -  - compatible: Must be "renesas,smp-sram",
> -  - reg: Address and length of the reserved SRAM.
> -    The full physical (bus) address must be aligned to a 256 KiB boundary.
> -
> -
> -Example:
> -
> -       icram1: sram@...c0000 {
> -               compatible = "mmio-sram";
> -               reg = <0 0xe63c0000 0 0x1000>;
> -               #address-cells = <1>;
> -               #size-cells = <1>;
> -               ranges = <0 0 0xe63c0000 0x1000>;
> -
> -               smp-sram@0 {
> -                       compatible = "renesas,smp-sram";
> -                       reg = <0 0x10>;
> -               };

> --- a/Documentation/devicetree/bindings/sram/sram.yaml
> +++ b/Documentation/devicetree/bindings/sram/sram.yaml

> @@ -186,3 +187,17 @@ examples:
>              reg = <0x1ff80 0x8>;
>          };
>      };
> +
> +  - |
> +    sram@...c0000 {
> +        compatible = "mmio-sram";
> +        reg = <0xe63c0000 0x1000>;

Is there any specific reason you converted the example from 64-bit to
32-bit addressing?
All Renesas SoCs using this have #address-cells and #size-cells = <2>.

Thanks!

> +        #address-cells = <1>;
> +        #size-cells = <1>;
> +        ranges = <0 0xe63c0000 0x1000>;
> +
> +        smp-sram@0 {
> +            compatible = "renesas,smp-sram";
> +            reg = <0 0x10>;
> +        };
> +    };

Gr{oetje,eeting}s,

                        Geert

-- 
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@...ux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

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