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Message-ID: <221c36d6646ea9f88d208dc02494872a34d8b61f.camel@intel.com>
Date: Fri, 01 Nov 2019 07:17:45 -0700
From: Yu-cheng Yu <yu-cheng.yu@...el.com>
To: Adrian Hunter <adrian.hunter@...el.com>, x86@...nel.org,
"H. Peter Anvin" <hpa@...or.com>,
Thomas Gleixner <tglx@...utronix.de>,
Ingo Molnar <mingo@...hat.com>, linux-kernel@...r.kernel.org,
linux-doc@...r.kernel.org, linux-mm@...ck.org,
linux-arch@...r.kernel.org, linux-api@...r.kernel.org,
Arnd Bergmann <arnd@...db.de>,
Andy Lutomirski <luto@...capital.net>,
Balbir Singh <bsingharora@...il.com>,
Borislav Petkov <bp@...en8.de>,
Cyrill Gorcunov <gorcunov@...il.com>,
Dave Hansen <dave.hansen@...ux.intel.com>,
Eugene Syromiatnikov <esyr@...hat.com>,
Florian Weimer <fweimer@...hat.com>,
"H.J. Lu" <hjl.tools@...il.com>, Jann Horn <jannh@...gle.com>,
Jonathan Corbet <corbet@....net>,
Kees Cook <keescook@...omium.org>,
Mike Kravetz <mike.kravetz@...cle.com>,
Nadav Amit <nadav.amit@...il.com>,
Oleg Nesterov <oleg@...hat.com>, Pavel Machek <pavel@....cz>,
Peter Zijlstra <peterz@...radead.org>,
Randy Dunlap <rdunlap@...radead.org>,
"Ravi V. Shankar" <ravi.v.shankar@...el.com>,
Vedvyas Shanbhogue <vedvyas.shanbhogue@...el.com>,
Dave Martin <Dave.Martin@....com>
Subject: Re: [PATCH v7 27/27] x86/cet/shstk: Add Shadow Stack instructions
to opcode map
On Fri, 2019-11-01 at 16:03 +0200, Adrian Hunter wrote:
> On 6/06/19 11:06 PM, Yu-cheng Yu wrote:
> > Add the following shadow stack management instructions.
> >
> > INCSSP:
> > Increment shadow stack pointer by the steps specified.
> >
> > RDSSP:
> > Read SSP register into a GPR.
> >
> > SAVEPREVSSP:
> > Use "prev ssp" token at top of current shadow stack to
> > create a "restore token" on previous shadow stack.
> >
> > RSTORSSP:
> > Restore from a "restore token" pointed by a GPR to SSP.
> >
> > WRSS:
> > Write to kernel-mode shadow stack (kernel-mode instruction).
> >
> > WRUSS:
> > Write to user-mode shadow stack (kernel-mode instruction).
> >
> > SETSSBSY:
> > Verify the "supervisor token" pointed by IA32_PL0_SSP MSR,
> > if valid, set the token to busy, and set SSP to the value
> > of IA32_PL0_SSP MSR.
> >
> > CLRSSBSY:
> > Verify the "supervisor token" pointed by a GPR, if valid,
> > clear the busy bit from the token.
>
> Does the notrack prefix also need to be catered for somehow?
Yes, I will fix it.
>
> >
> > Signed-off-by: Yu-cheng Yu <yu-cheng.yu@...el.com>
> > ---
> > arch/x86/lib/x86-opcode-map.txt | 26 +++++++++++++------
> > tools/objtool/arch/x86/lib/x86-opcode-map.txt | 26 +++++++++++++------
> > 2 files changed, 36 insertions(+), 16 deletions(-)
> >
> > diff --git a/arch/x86/lib/x86-opcode-map.txt b/arch/x86/lib/x86-opcode-map.txt
> > index e0b85930dd77..c5e825d44766 100644
> > --- a/arch/x86/lib/x86-opcode-map.txt
> > +++ b/arch/x86/lib/x86-opcode-map.txt
> > @@ -366,7 +366,7 @@ AVXcode: 1
> > 1b: BNDCN Gv,Ev (F2) | BNDMOV Ev,Gv (66) | BNDMK Gv,Ev (F3) | BNDSTX Ev,Gv
> > 1c:
> > 1d:
> > -1e:
> > +1e: RDSSP Rd (F3),REX.W
> > 1f: NOP Ev
> > # 0x0f 0x20-0x2f
> > 20: MOV Rd,Cd
> > @@ -610,7 +610,17 @@ fe: paddd Pq,Qq | vpaddd Vx,Hx,Wx (66),(v1)
> > ff: UD0
> > EndTable
> >
> > -Table: 3-byte opcode 1 (0x0f 0x38)
> > +Table: 3-byte opcode 1 (0x0f 0x01)
> > +Referrer:
> > +AVXcode:
> > +# Skip 0x00-0xe7
> > +e8: SETSSBSY (f3)
> > +e9:
> > +ea: SAVEPREVSSP (f3)
> > +# Skip 0xeb-0xff
> > +EndTable
> > +
> > +Table: 3-byte opcode 2 (0x0f 0x38)
> > Referrer: 3-byte escape 1
> > AVXcode: 2
> > # 0x0f 0x38 0x00-0x0f
> > @@ -789,12 +799,12 @@ f0: MOVBE Gy,My | MOVBE Gw,Mw (66) | CRC32 Gd,Eb (F2) | CRC32 Gd,Eb (66&F2)
> > f1: MOVBE My,Gy | MOVBE Mw,Gw (66) | CRC32 Gd,Ey (F2) | CRC32 Gd,Ew (66&F2)
> > f2: ANDN Gy,By,Ey (v)
> > f3: Grp17 (1A)
> > -f5: BZHI Gy,Ey,By (v) | PEXT Gy,By,Ey (F3),(v) | PDEP Gy,By,Ey (F2),(v)
> > -f6: ADCX Gy,Ey (66) | ADOX Gy,Ey (F3) | MULX By,Gy,rDX,Ey (F2),(v)
> > +f5: BZHI Gy,Ey,By (v) | PEXT Gy,By,Ey (F3),(v) | PDEP Gy,By,Ey (F2),(v) | WRUSS Pq,Qq (66),REX.W
> > +f6: ADCX Gy,Ey (66) | ADOX Gy,Ey (F3) | MULX By,Gy,rDX,Ey (F2),(v) | WRSS Pq,Qq (66),REX.W
>
> AFAICT WRSS does not have 66 prefix
I will check.
Thanks,
Yu-cheng
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