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Message-Id: <20191101152022.8853-1-julien@xen.org>
Date:   Fri,  1 Nov 2019 15:20:22 +0000
From:   Julien Grall <julien@....org>
To:     linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org
Cc:     will@...nel.org, catalin.marinas@....com, suzuki.poulose@....com,
        Julien Grall <julien.grall@....com>
Subject: [PATCH] docs/arm64: cpu-feature-registers: Rewrite bitfields that don't follow [e, s]

From: Julien Grall <julien.grall@....com>

Commit "docs/arm64: cpu-feature-registers: Documents missing visible
fields" added bitfiels following the convention [s, e]. However, the
documentation is following [s, e] and so does the Arm ARM.

Rewrite the bitfields to match the format [e, s].

Signed-off-by: Julien Grall <julien.grall@....com>

---

This is based on the branch for-next/elf-hwcap-docs from the tree
arm64/linux.git.
---
 Documentation/arm64/cpu-feature-registers.rst | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/Documentation/arm64/cpu-feature-registers.rst b/Documentation/arm64/cpu-feature-registers.rst
index ffcf4e2c71ef..7c40e4581bae 100644
--- a/Documentation/arm64/cpu-feature-registers.rst
+++ b/Documentation/arm64/cpu-feature-registers.rst
@@ -193,9 +193,9 @@ infrastructure:
      +------------------------------+---------+---------+
      | Name                         |  bits   | visible |
      +------------------------------+---------+---------+
-     | SB                           | [36-39] |    y    |
+     | SB                           | [39-36] |    y    |
      +------------------------------+---------+---------+
-     | FRINTTS                      | [32-35] |    y    |
+     | FRINTTS                      | [35-32] |    y    |
      +------------------------------+---------+---------+
      | GPI                          | [31-28] |    y    |
      +------------------------------+---------+---------+
-- 
2.17.1

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