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Message-ID: <0f79794b-ca33-fc00-645a-9cd37aa6fdd4@ti.com>
Date:   Fri, 1 Nov 2019 19:29:22 +0200
From:   Grygorii Strashko <grygorii.strashko@...com>
To:     Andrew Lunn <andrew@...n.ch>
CC:     <netdev@...r.kernel.org>,
        Ilias Apalodimas <ilias.apalodimas@...aro.org>,
        "David S . Miller" <davem@...emloft.net>,
        Ivan Khoronzhuk <ivan.khoronzhuk@...aro.org>,
        Jiri Pirko <jiri@...nulli.us>,
        Florian Fainelli <f.fainelli@...il.com>,
        Sekhar Nori <nsekhar@...com>, <linux-kernel@...r.kernel.org>,
        <linux-omap@...r.kernel.org>,
        Murali Karicheri <m-karicheri2@...com>,
        Ivan Vecera <ivecera@...hat.com>,
        Rob Herring <robh+dt@...nel.org>, <devicetree@...r.kernel.org>
Subject: Re: [PATCH v5 net-next 05/12] dt-bindings: net: ti: add new cpsw
 switch driver bindings

hi Andrew,

On 29/10/2019 04:23, Andrew Lunn wrote:
>> +TI SoC Ethernet Switch Controller Device Tree Bindings (new)
>> +------------------------------------------------------
>> +
>> +The 3-port switch gigabit ethernet subsystem provides ethernet packet
>> +communication and can be configured as an ethernet switch.
> 
> Hi Grygorii
> 
> Maybe referring it to a 3-port switch will cause confusion, since in
> this use case, it only has 2 ports, and you only list two ports in the
> device tree.

Yeah. This is how it's defined in TRM - Port 0 (CPU port) is the same as external Port from
CPSW switch core point of view.

> 
>> It provides the
>> +gigabit media independent interface (GMII),reduced gigabit media
>> +independent interface (RGMII), reduced media independent interface (RMII),

[...]

>> +
>> +&mac_sw {
>> +	pinctrl-names = "default", "sleep";
>> +	status = "okay";
>> +};
>> +
>> +&cpsw_port1 {
>> +	phy-handle = <&ethphy0_sw>;
>> +	phy-mode = "rgmii";
>> +	ti,dual_emac_pvid = <1>;
>> +};
>> +
>> +&cpsw_port2 {
>> +	phy-handle = <&ethphy1_sw>;
>> +	phy-mode = "rgmii";
>> +	ti,dual_emac_pvid = <2>;
>> +};
>> +
>> +&davinci_mdio_sw {
>> +	ethphy0_sw: ethernet-phy@0 {
>> +		reg = <0>;
>> +	};
>> +
>> +	ethphy1_sw: ethernet-phy@1 {
>> +		reg = <1>;
>> +	};
>> +};
> 
> In an example, it is unusual to split things up like this. I
> understand that parts of this will be in the dtsi file, and parts in
> the .dts file, but examples generally keep it all as one. And when you
> re-write this in YAML so it can be used to validated real DTs, you
> will have to combine it.

Thank you. I'll update.

-- 
Best regards,
grygorii

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