linux-kernel - Re: [PATCH v2] pinctrl: at91: Enable slewrate by default on SAM9X60

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Message-ID: <4255d320-e6c2-8865-7167-ddf9e1951250@microchip.com>
Date:   Fri, 1 Nov 2019 22:26:07 +0000
From:   <Claudiu.Beznea@...rochip.com>
To:     <Ludovic.Desroches@...rochip.com>,
        <Codrin.Ciubotariu@...rochip.com>
CC:     <linux-arm-kernel@...ts.infradead.org>,
        <linux-gpio@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
        <devicetree@...r.kernel.org>, <linus.walleij@...aro.org>,
        <Nicolas.Ferre@...rochip.com>, <alexandre.belloni@...tlin.com>,
        <robh+dt@...nel.org>
Subject: Re: [PATCH v2] pinctrl: at91: Enable slewrate by default on SAM9X60



On 01.11.2019 16:26, Ludovic Desroches - M43218 wrote:
> On Fri, Nov 01, 2019 at 11:20:31AM +0200, Codrin Ciubotariu wrote:
>> On SAM9X60, slewrate should be enabled on pins with a switching frequency
>> below 50Mhz. Since most of our pins do not exceed this value, we enable
>> slewrate by default. Pins with a switching value that exceeds 50Mhz will
>> have to explicitly disable slewrate.
>>
>> This patch changes the ABI. However, the slewrate macros are only used
>> by SAM9X60 and, at this moment, there are no device-tree files available
>> for this platform.
>>
>> Suggested-by: Ludovic Desroches <ludovic.desroches@...rochip.com>
>> Signed-off-by: Codrin Ciubotariu <codrin.ciubotariu@...rochip.com>
> Acked-by: Ludovic Desroches <ludovic.desroches@...rochip.com>

Reviewed-by: Claudiu Beznea <claudiu.beznea@...rochip.com>

> 
> Thanks
> 
>> ---
>>
>> Changes in v2:
>>  - updated commit message to reflect the ABI change
>>
>>  drivers/pinctrl/pinctrl-at91.c     | 4 ++--
>>  include/dt-bindings/pinctrl/at91.h | 4 ++--
>>  2 files changed, 4 insertions(+), 4 deletions(-)
>>
>> diff --git a/drivers/pinctrl/pinctrl-at91.c b/drivers/pinctrl/pinctrl-at91.c
>> index 117075b5798f..c135149e84e9 100644
>> --- a/drivers/pinctrl/pinctrl-at91.c
>> +++ b/drivers/pinctrl/pinctrl-at91.c
>> @@ -85,8 +85,8 @@ enum drive_strength_bit {
>>  					 DRIVE_STRENGTH_SHIFT)
>>  
>>  enum slewrate_bit {
>> -	SLEWRATE_BIT_DIS,
>>  	SLEWRATE_BIT_ENA,
>> +	SLEWRATE_BIT_DIS,
>>  };
>>  
>>  #define SLEWRATE_BIT_MSK(name)		(SLEWRATE_BIT_##name << SLEWRATE_SHIFT)
>> @@ -669,7 +669,7 @@ static void at91_mux_sam9x60_set_slewrate(void __iomem *pio, unsigned pin,
>>  {
>>  	unsigned int tmp;
>>  
>> -	if (setting < SLEWRATE_BIT_DIS || setting > SLEWRATE_BIT_ENA)
>> +	if (setting < SLEWRATE_BIT_ENA || setting > SLEWRATE_BIT_DIS)
>>  		return;
>>  
>>  	tmp = readl_relaxed(pio + SAM9X60_PIO_SLEWR);
>> diff --git a/include/dt-bindings/pinctrl/at91.h b/include/dt-bindings/pinctrl/at91.h
>> index 3831f91fb3ba..e8e117306b1b 100644
>> --- a/include/dt-bindings/pinctrl/at91.h
>> +++ b/include/dt-bindings/pinctrl/at91.h
>> @@ -27,8 +27,8 @@
>>  #define AT91_PINCTRL_DRIVE_STRENGTH_MED			(0x2 << 5)
>>  #define AT91_PINCTRL_DRIVE_STRENGTH_HI			(0x3 << 5)
>>  
>> -#define AT91_PINCTRL_SLEWRATE_DIS	(0x0 << 9)
>> -#define AT91_PINCTRL_SLEWRATE_ENA	(0x1 << 9)
>> +#define AT91_PINCTRL_SLEWRATE_ENA	(0x0 << 9)
>> +#define AT91_PINCTRL_SLEWRATE_DIS	(0x1 << 9)
>>  
>>  #define AT91_PIOA	0
>>  #define AT91_PIOB	1
>> -- 
>> 2.20.1
>>
>