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Message-ID: <20191104115238.2394-1-chao.hao@mediatek.com>
Date: Mon, 4 Nov 2019 19:52:25 +0800
From: Chao Hao <chao.hao@...iatek.com>
To: Joerg Roedel <joro@...tes.org>, Rob Herring <robh+dt@...nel.org>,
Matthias Brugger <matthias.bgg@...il.com>
CC: <iommu@...ts.linux-foundation.org>, <devicetree@...r.kernel.org>,
<linux-kernel@...r.kernel.org>,
<linux-arm-kernel@...ts.infradead.org>,
<linux-mediatek@...ts.infradead.org>, <wsd_upstream@...iatek.com>,
Jun Yan <jun.yan@...iatek.com>,
Cui Zhang <cui.zhang@...iatek.com>,
Guangming Cao <guangming.cao@...iatek.com>,
Yong Wu <yong.wu@...iatek.com>,
Anan Sun <anan.sun@...iatek.com>,
Miles Chen <miles.chen@...iatek.com>,
Chao Hao <chao.hao@...iatek.com>
Subject: [RESEND,PATCH 00/13] MT6779 IOMMU SUPPORT
I am sorry that previous patchset(2019/10/28) has a problem with e-mail format, some websites don't recevied it,
so please based on this patchset to review, thanks!
This patchset adds mt6779 iommu support and adjusts mtk iommu software architecture mainly.
1. Add mt6779 basic function, such as smi_larb port define, registers define and so on.
2. In addition, this patchset will adjust current mtk iommu SW architecture mainly to adapt all the mtk platforms:
Firstly, mt6779 iommu can support more HW modules, but some modules have special requirements for iova region,
for example, CCU only can access 0x4000_0000~0x47ff_ffff, VPU only can access 0x7da0_0000~0x7fbf_ffff. Current
architecture only support one iommu domain(include 0~4GB), all the modules allocate iova from 0~4GB region, so
it doesn't ensure to allocate expected iova region for special module(CCU and VPU). In order to resolve the problem,
we will create different iommu domains for special module, and every domain can include iova region which module
needs.
Secondly, all the iommus share one page table for current architecture by "mtk_iommu_get_m4u_data", to make the
architecture look clearly, we will create a global page table firstly(mtk_iommu_pgtable), and all the iommus can
use it. One page table can include 4GB iova space, so multiple iommu domains are created based on the same page
table. New SW architecture diagram is as below:
iommu0 iommu1
| |
----------
|
mtk_iommu_pgtable
|
------------------------------------------
| | |
mtk_iommu_domain1 mtk_iommu_domain2 mtk_iommu_domain3
| | |
iommu_group1 iommu_group2 iommu_group3
| | |
iommu_domain1 iommu_domain2 iommu_domain3
| | |
iova region1(normal) iova region2(CCU) iova region3(VPU)
This patchset depends on "Improve tlb range flush"[1] and based on v5.4-rc1.
[1]http://lists.infradead.org/pipermail/linux-mediatek/2019-October/024207.html
Chao Hao (13):
dt-bindings: mediatek: Add bindings for MT6779
iommu/mediatek: Add mt6779 IOMMU basic support
iommu/mediatek: Add mtk_iommu_pgtable structure
iommu/mediatek: Remove mtk_iommu_domain_finalise
iommu/mediatek: Remove pgtable info in mtk_iommu_domain
iommu/mediatek: Change get the way of m4u_group
iommu/mediatek: Add smi_larb info about device
iommu/mediatek: Add mtk_domain_data structure
iommu/mediatek: Remove the usage of m4u_dom variable
iommu/mediatek: Remove mtk_iommu_get_m4u_data api
iommu/mediatek: Add iova reserved function
iommu/mediatek: Change single domain to multiple domains
iommu/mediatek: Add multiple mtk_iommu_domain support for mt6779
.../bindings/iommu/mediatek,iommu.txt | 2 +
drivers/iommu/mtk_iommu.c | 488 +++++++++++++++---
drivers/iommu/mtk_iommu.h | 50 +-
include/dt-bindings/memory/mt6779-larb-port.h | 217 ++++++++
4 files changed, 685 insertions(+), 72 deletions(-)
--
2.18.0
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