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Message-Id: <20191104023305.9581-1-alastair@au1.ibm.com>
Date: Mon, 4 Nov 2019 13:32:52 +1100
From: "Alastair D'Silva" <alastair@....ibm.com>
To: alastair@...ilva.org
Cc: Benjamin Herrenschmidt <benh@...nel.crashing.org>,
Paul Mackerras <paulus@...ba.org>,
Michael Ellerman <mpe@...erman.id.au>,
Christophe Leroy <christophe.leroy@....fr>,
Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
Thomas Gleixner <tglx@...utronix.de>, Qian Cai <cai@....pw>,
Nicholas Piggin <npiggin@...il.com>,
Allison Randal <allison@...utok.net>,
Andrew Morton <akpm@...ux-foundation.org>,
David Hildenbrand <david@...hat.com>,
linuxppc-dev@...ts.ozlabs.org, linux-kernel@...r.kernel.org
Subject: [PATCH v5 0/6] powerpc: convert cache asm to C
From: Alastair D'Silva <alastair@...ilva.org>
This series addresses a few issues discovered in how we flush caches:
1. Flushes were truncated at 4GB, so larger flushes were incorrect.
2. Flushing the dcache in arch_add_memory was unnecessary
This series also converts much of the cache assembler to C, with the
aim of making it easier to maintain.
Changelog:
V5:
- in "Chunk Calls to flush_dcache_range ...":
- Honour the 'chunk' parameter
- Rebase to latest master
V4:
- Split out VDSO patch
- Pass/cast the correct types in 'powerpc: Convert
flush_icache_range & friends to C'
V3:
- factor out chunking loop
- Replace __asm__ __volatile__ with asm volatile
- Replace flush_coherent_icache_or_return macro with
flush_coherent_icache function
- factor our invalidate_icache_range
- Replace code duplicating clean_dcache_range() in
__flush_dcache_icache() with a call to clean_dcache_range()
- Remove redundant #ifdef CONFIG_44x
- Fix preprocessor logic:
#if !defined(CONFIG_PPC_8xx) & !defined(CONFIG_PPC64)
- Added loop(1|2) to earlyclobbers in flush_dcache_icache_phys
- Drop "Remove extern" patch
- Replace 32 bit shifts in 64 bit VDSO with 64 bit ones
V2:
- Replace C implementation of flush_dcache_icache_phys() with
inline assembler authored by Christophe Leroy
- Add memory clobbers for iccci implementation
- Give __flush_dcache_icache a real implementation, it can't
just be a wrapper around flush_icache_range()
- Remove PPC64_CACHES from misc_64.S
- Replace code duplicating clean_dcache_range() in
flush_icache_range() with a call to clean_dcache_range()
- Replace #ifdef CONFIG_44x with IS_ENABLED(...) in
flush_icache_cange()
- Use 1GB chunks instead of 16GB in arch_*_memory
Alastair D'Silva (6):
powerpc: Allow flush_icache_range to work across ranges >4GB
powerpc: Allow 64bit VDSO __kernel_sync_dicache to work across ranges
>4GB
powerpc: define helpers to get L1 icache sizes
powerpc: Convert flush_icache_range & friends to C
powerpc: Chunk calls to flush_dcache_range in arch_*_memory
powerpc: Don't flush caches when adding memory
arch/powerpc/include/asm/cache.h | 55 +++++---
arch/powerpc/include/asm/cacheflush.h | 36 +++--
arch/powerpc/kernel/misc_32.S | 120 ----------------
arch/powerpc/kernel/misc_64.S | 102 --------------
arch/powerpc/kernel/vdso64/cacheflush.S | 4 +-
arch/powerpc/mm/mem.c | 176 +++++++++++++++++++++++-
6 files changed, 228 insertions(+), 265 deletions(-)
--
2.21.0
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