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Message-ID: <74435ba6-51dc-1dff-b55b-cdcf85e2e302@c-s.fr>
Date: Tue, 5 Nov 2019 07:04:04 +0100
From: Christophe Leroy <christophe.leroy@....fr>
To: Segher Boessenkool <segher@...nel.crashing.org>,
Alastair D'Silva <alastair@....ibm.com>
Cc: David Hildenbrand <david@...hat.com>,
Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
linux-kernel@...r.kernel.org, stable@...r.kernel.org,
Paul Mackerras <paulus@...ba.org>,
Nicholas Piggin <npiggin@...il.com>, alastair@...ilva.org,
Qian Cai <cai@....pw>, Thomas Gleixner <tglx@...utronix.de>,
linuxppc-dev@...ts.ozlabs.org,
Andrew Morton <akpm@...ux-foundation.org>,
Allison Randal <allison@...utok.net>
Subject: Re: [PATCH v5 1/6] powerpc: Allow flush_icache_range to work across
ranges >4GB
Le 04/11/2019 à 20:43, Segher Boessenkool a écrit :
> On Mon, Nov 04, 2019 at 01:32:53PM +1100, Alastair D'Silva wrote:
>> When calling flush_icache_range with a size >4GB, we were masking
>> off the upper 32 bits, so we would incorrectly flush a range smaller
>> than intended.
>>
>> This patch replaces the 32 bit shifts with 64 bit ones, so that
>> the full size is accounted for.
>
> Please send this separately, to be committed right now? It is a bug fix,
> independent of the rest of the series.
>
Patch 4/6 needs it, as it drops the function.
Or do you mean that the series should drop the assembly at once, and
this patch should only go into stable ?
But I guess mpe can take this patch alone if he wants to ?
By the way, Patch 2/6 is also a bugfix.
Christophe
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