linux-kernel - [PATCH 1/4] ARM: dts: stm32: add pwm sleep pin muxing for stm32mp157c-ed1

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Date:   Tue, 5 Nov 2019 13:52:18 +0100
From:   Fabrice Gasnier <fabrice.gasnier@...com>
To:     <alexandre.torgue@...com>
CC:     <robh+dt@...nel.org>, <mcoquelin.stm32@...il.com>,
        <mark.rutland@....com>, <linux-arm-kernel@...ts.infradead.org>,
        <devicetree@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
        <linux-stm32@...md-mailman.stormreply.com>,
        <fabrice.gasnier@...com>
Subject: [PATCH 1/4] ARM: dts: stm32: add pwm sleep pin muxing for stm32mp157c-ed1

Add PWM pinctrl definitions used in low-power (sleep) mode on
stm32mp157c-ed1.

Signed-off-by: Fabrice Gasnier <fabrice.gasnier@...com>
---
 arch/arm/boot/dts/stm32mp157-pinctrl.dtsi | 18 ++++++++++++++++++
 1 file changed, 18 insertions(+)

diff --git a/arch/arm/boot/dts/stm32mp157-pinctrl.dtsi b/arch/arm/boot/dts/stm32mp157-pinctrl.dtsi
index 1e45b75..de5679f 100644
--- a/arch/arm/boot/dts/stm32mp157-pinctrl.dtsi
+++ b/arch/arm/boot/dts/stm32mp157-pinctrl.dtsi
@@ -596,6 +596,12 @@
 				};
 			};
 
+			pwm2_sleep_pins_a: pwm2-sleep-0 {
+				pins {
+					pinmux = <STM32_PINMUX('A', 3, ANALOG)>; /* TIM2_CH4 */
+				};
+			};
+
 			pwm8_pins_a: pwm8-0 {
 				pins {
 					pinmux = <STM32_PINMUX('I', 2, AF3)>; /* TIM8_CH4 */
@@ -605,6 +611,12 @@
 				};
 			};
 
+			pwm8_sleep_pins_a: pwm8-sleep-0 {
+				pins {
+					pinmux = <STM32_PINMUX('I', 2, ANALOG)>; /* TIM8_CH4 */
+				};
+			};
+
 			pwm12_pins_a: pwm12-0 {
 				pins {
 					pinmux = <STM32_PINMUX('H', 6, AF2)>; /* TIM12_CH1 */
@@ -614,6 +626,12 @@
 				};
 			};
 
+			pwm12_sleep_pins_a: pwm12-sleep-0 {
+				pins {
+					pinmux = <STM32_PINMUX('H', 6, ANALOG)>; /* TIM12_CH1 */
+				};
+			};
+
 			qspi_clk_pins_a: qspi-clk-0 {
 				pins {
 					pinmux = <STM32_PINMUX('F', 10, AF9)>; /* QSPI_CLK */
-- 
2.7.4