[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-Id: <1573053633-21437-6-git-send-email-mirela.rabulea@nxp.com>
Date: Wed, 6 Nov 2019 17:20:33 +0200
From: Mirela Rabulea <mirela.rabulea@....com>
To: mchehab@...nel.org, shawnguo@...nel.org, robh+dt@...nel.org
Cc: hverkuil-cisco@...all.nl, paul.kocialkowski@...tlin.com,
linux-media@...r.kernel.org, linux-kernel@...r.kernel.org,
linux-imx@....com, s.hauer@...gutronix.de, aisheng.dong@....com,
daniel.baluta@....com, leonard.crestez@....com,
robert.chiras@....com, laurentiu.palcu@....com,
mark.rutland@....com, devicetree@...r.kernel.org,
p.zabel@...gutronix.de, laurent.pinchart+renesas@...asonboard.com,
niklas.soderlund+renesas@...natech.se,
dafna.hirschfeld@...labora.com,
Mirela Rabulea <mirela.rabulea@....com>
Subject: [PATCH 5/5] arm64: dts: imx8qxp: Add jpeg encoder/decoder nodes
Add jpeg decoder/encoder nodes, for now on imx8qxp only.
The same should work on imx8qm, but it was not tested.
Signed-off-by: Mirela Rabulea <mirela.rabulea@....com>
---
arch/arm64/boot/dts/freescale/imx8qxp-mek.dts | 8 ++++++
arch/arm64/boot/dts/freescale/imx8qxp.dtsi | 37 +++++++++++++++++++++++++++
2 files changed, 45 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/imx8qxp-mek.dts b/arch/arm64/boot/dts/freescale/imx8qxp-mek.dts
index d3d26cc..3c6fe76 100644
--- a/arch/arm64/boot/dts/freescale/imx8qxp-mek.dts
+++ b/arch/arm64/boot/dts/freescale/imx8qxp-mek.dts
@@ -242,3 +242,11 @@
&scu_key {
status = "okay";
};
+
+&jpegdec {
+ status = "okay";
+};
+
+&jpegenc {
+ status = "okay";
+};
diff --git a/arch/arm64/boot/dts/freescale/imx8qxp.dtsi b/arch/arm64/boot/dts/freescale/imx8qxp.dtsi
index 9646a41..e4eddc4 100644
--- a/arch/arm64/boot/dts/freescale/imx8qxp.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8qxp.dtsi
@@ -598,4 +598,41 @@
#clock-cells = <1>;
};
};
+
+ img_subsys: bus@...00000 {
+ compatible = "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x58000000 0x0 0x58000000 0x1000000>;
+
+ jpegdec: jpegdec@...00000 {
+ compatible = "fsl,imx8-jpgdec";
+ reg = <0x58400000 0x00050000 >;
+ interrupts = <GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>;
+ power-domains = <&pd IMX_SC_R_MJPEG_DEC_MP>,
+ <&pd IMX_SC_R_MJPEG_DEC_S0>,
+ <&pd IMX_SC_R_MJPEG_DEC_S1>,
+ <&pd IMX_SC_R_MJPEG_DEC_S2>,
+ <&pd IMX_SC_R_MJPEG_DEC_S3>;
+ status = "disabled";
+ };
+
+ jpegenc: jpegenc@...50000 {
+ compatible = "fsl,imx8-jpgenc";
+ reg = <0x58450000 0x00050000 >;
+ interrupts = <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 306 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>;
+ power-domains = <&pd IMX_SC_R_MJPEG_ENC_MP>,
+ <&pd IMX_SC_R_MJPEG_ENC_S0>,
+ <&pd IMX_SC_R_MJPEG_ENC_S1>,
+ <&pd IMX_SC_R_MJPEG_ENC_S2>,
+ <&pd IMX_SC_R_MJPEG_ENC_S3>;
+ status = "disabled";
+ };
+ };
};
--
2.7.4
Powered by blists - more mailing lists