linux-kernel - RE: [PATCH v6 1/3] dt-bindings: pci: layerscape-pci: add compatible strings "fsl,ls1028a-pcie"

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Message-ID: <AM5PR04MB3299603C8DD13CC25BDFBEBAF5780@AM5PR04MB3299.eurprd04.prod.outlook.com>
Date:   Thu, 7 Nov 2019 03:07:26 +0000
From:   Xiaowei Bao <xiaowei.bao@....com>
To:     Lorenzo Pieralisi <lorenzo.pieralisi@....com>
CC:     "robh+dt@...nel.org" <robh+dt@...nel.org>,
        "mark.rutland@....com" <mark.rutland@....com>,
        "shawnguo@...nel.org" <shawnguo@...nel.org>,
        Leo Li <leoyang.li@....com>,
        "M.h. Lian" <minghuan.lian@....com>,
        Mingkai Hu <mingkai.hu@....com>, Roy Zang <roy.zang@....com>,
        "linux-pci@...r.kernel.org" <linux-pci@...r.kernel.org>,
        "devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        "linux-arm-kernel@...ts.infradead.org" 
        <linux-arm-kernel@...ts.infradead.org>,
        "linuxppc-dev@...ts.ozlabs.org" <linuxppc-dev@...ts.ozlabs.org>,
        "bhelgaas@...gle.com" <bhelgaas@...gle.com>,
        "Z.q. Hou" <zhiqiang.hou@....com>
Subject: RE: [PATCH v6 1/3] dt-bindings: pci: layerscape-pci: add compatible
 strings "fsl,ls1028a-pcie"



> -----Original Message-----
> From: Lorenzo Pieralisi <lorenzo.pieralisi@....com>
> Sent: 2019年11月7日 0:10
> To: Xiaowei Bao <xiaowei.bao@....com>
> Cc: robh+dt@...nel.org; mark.rutland@....com; shawnguo@...nel.org; Leo
> Li <leoyang.li@....com>; M.h. Lian <minghuan.lian@....com>; Mingkai Hu
> <mingkai.hu@....com>; Roy Zang <roy.zang@....com>;
> linux-pci@...r.kernel.org; devicetree@...r.kernel.org;
> linux-kernel@...r.kernel.org; linux-arm-kernel@...ts.infradead.org;
> linuxppc-dev@...ts.ozlabs.org; bhelgaas@...gle.com; Z.q. Hou
> <zhiqiang.hou@....com>
> Subject: Re: [PATCH v6 1/3] dt-bindings: pci: layerscape-pci: add compatible
> strings "fsl,ls1028a-pcie"
> 
> On Mon, Sep 02, 2019 at 11:43:17AM +0800, Xiaowei Bao wrote:
> > Add the PCIe compatible string for LS1028A
> 
> Sentences must be terminated with a period.
> 
> > Signed-off-by: Xiaowei Bao <xiaowei.bao@....com>
> > Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@....com>
> > Reviewed-by: Rob Herring <robh@...nel.org>
> > ---
> > v2:
> >  - No change.
> > v3:
> >  - No change.
> > v4:
> >  - No change.
> > v5:
> >  - No change.
> > v6:
> >  - No change.
> >
> >  Documentation/devicetree/bindings/pci/layerscape-pci.txt | 1 +
> >  1 file changed, 1 insertion(+)
> >
> > diff --git a/Documentation/devicetree/bindings/pci/layerscape-pci.txt
> b/Documentation/devicetree/bindings/pci/layerscape-pci.txt
> > index e20ceaa..99a386e 100644
> > --- a/Documentation/devicetree/bindings/pci/layerscape-pci.txt
> > +++ b/Documentation/devicetree/bindings/pci/layerscape-pci.txt
> > @@ -21,6 +21,7 @@ Required properties:
> >          "fsl,ls1046a-pcie"
> >          "fsl,ls1043a-pcie"
> >          "fsl,ls1012a-pcie"
> > +        "fsl,ls1028a-pcie"
> >    EP mode:
> >  	"fsl,ls1046a-pcie-ep", "fsl,ls-pcie-ep"
> >  - reg: base addresses and lengths of the PCIe controller register blocks.
> 
> I have applied this series to pci/layerscape, thanks.

Thank you for your corrections and comments, I will pay attention to the details
and quality of each patch in the future.

> 
> Lorenzo