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Message-ID: <18b68b8f-773d-8493-22ab-0be3e749b04b@linux.intel.com>
Date:   Thu, 7 Nov 2019 09:27:15 -0600
From:   Pierre-Louis Bossart <pierre-louis.bossart@...ux.intel.com>
To:     Ravulapati Vishnu vardhan rao 
        <Vishnuvardhanrao.Ravulapati@....com>
Cc:     "moderated list:SOUND - SOC LAYER / DYNAMIC AUDIO POWER MANAGEM..." 
        <alsa-devel@...a-project.org>,
        Maruthi Bayyavarapu <maruthi.bayyavarapu@....com>,
        Kuninori Morimoto <kuninori.morimoto.gx@...esas.com>,
        open list <linux-kernel@...r.kernel.org>,
        Takashi Iwai <tiwai@...e.com>,
        YueHaibing <yuehaibing@...wei.com>,
        Liam Girdwood <lgirdwood@...il.com>, Akshu.Agrawal@....com,
        Mark Brown <broonie@...nel.org>, djkurtz@...gle.com,
        Vijendar Mukunda <Vijendar.Mukunda@....com>,
        Alexander.Deucher@....com,
        Colin Ian King <colin.king@...onical.com>
Subject: Re: [alsa-devel] [RESEND PATCH v3 5/6] ASoC: amd: handle ACP3x i2s-sp
 watermark interrupt.



On 11/7/19 7:24 AM, Ravulapati Vishnu vardhan rao wrote:
> whenever audio data equal to I2S-SP fifo watermark level is
> produced/consumed, interrupt is generated.
> 
> Signed-off-by: Ravulapati Vishnu vardhan rao <Vishnuvardhanrao.Ravulapati@....com>
> ---
>   sound/soc/amd/raven/acp3x-pcm-dma.c | 14 ++++++++++++++
>   1 file changed, 14 insertions(+)
> 
> diff --git a/sound/soc/amd/raven/acp3x-pcm-dma.c b/sound/soc/amd/raven/acp3x-pcm-dma.c
> index 8fab505..629a32f 100644
> --- a/sound/soc/amd/raven/acp3x-pcm-dma.c
> +++ b/sound/soc/amd/raven/acp3x-pcm-dma.c
> @@ -176,6 +176,13 @@ static irqreturn_t i2s_irq_handler(int irq, void *dev_id)
>   		snd_pcm_period_elapsed(rv_i2s_data->play_stream);
>   		play_flag = 1;
>   	}
> +	if ((val & BIT(I2S_TX_THRESHOLD)) &&
> +				rv_i2s_data->i2ssp_play_stream) {
> +		rv_writel(BIT(I2S_TX_THRESHOLD),
> +			rv_i2s_data->acp3x_base	+ mmACP_EXTERNAL_INTR_STAT);
> +		snd_pcm_period_elapsed(rv_i2s_data->i2ssp_play_stream);

The commit message looks odd. If you have a DMA and signal a period 
elapsed, is this really a case where the FIFO level reaches a watermark?
Usually the FIFOs are somewhat small and there are multiple DMA 
transfers per period?

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