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Message-Id: <20191108164853.EA1C22178F@mail.kernel.org>
Date: Fri, 08 Nov 2019 08:48:53 -0800
From: Stephen Boyd <sboyd@...nel.org>
To: Andrew Jeffery <andrew@...id.au>, linux-clk@...r.kernel.org
Cc: mturquette@...libre.com, joel@....id.au, robh+dt@...nel.org,
mark.rutland@....com, linux-arm-kernel@...ts.infradead.org,
linux-aspeed@...ts.ozlabs.org, linux-kernel@...r.kernel.org,
devicetree@...r.kernel.org
Subject: Re: [PATCH v2 2/2] clk: ast2600: Add RMII RCLK gates for all four MACs
Quoting Andrew Jeffery (2019-10-09 19:07:25)
> RCLK is a fixed 50MHz clock derived from HPLL/HCLK that is described by a
> single gate for each MAC.
>
> Signed-off-by: Andrew Jeffery <andrew@...id.au>
> ---
Applied to clk-next
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