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Message-Id: <1573244313-9190-5-git-send-email-eajames@linux.ibm.com>
Date: Fri, 8 Nov 2019 14:18:25 -0600
From: Eddie James <eajames@...ux.ibm.com>
To: linux-kernel@...r.kernel.org
Cc: linux-aspeed@...ts.ozlabs.org, andrew@...id.au, joel@....id.au,
maz@...nel.org, jason@...edaemon.net, tglx@...utronix.de,
robh+dt@...nel.org, mark.rutland@....com,
devicetree@...r.kernel.org
Subject: [PATCH 04/12] ARM: dts: aspeed: ast2600: Add SCU interrupt controllers
Add nodes for the interrupt controllers provided by the SCU.
Signed-off-by: Eddie James <eajames@...ux.ibm.com>
---
arch/arm/boot/dts/aspeed-g6.dtsi | 18 ++++++++++++++++++
1 file changed, 18 insertions(+)
diff --git a/arch/arm/boot/dts/aspeed-g6.dtsi b/arch/arm/boot/dts/aspeed-g6.dtsi
index 5f6142d..65ea2b2 100644
--- a/arch/arm/boot/dts/aspeed-g6.dtsi
+++ b/arch/arm/boot/dts/aspeed-g6.dtsi
@@ -288,6 +288,24 @@
compatible = "aspeed,ast2600-smpmem";
reg = <0x180 0x40>;
};
+
+ scu_ic0: interrupt-controller@0 {
+ #interrupt-cells = <1>;
+ compatible = "aspeed,ast2600-scu-ic0";
+ reg = <0x560 0x4>;
+ interrupt-parent = <&gic>;
+ interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-controller;
+ };
+
+ scu_ic1: interrupt-controller@1 {
+ #interrupt-cells = <1>;
+ compatible = "aspeed,ast2600-scu-ic1";
+ reg = <0x570 0x4>;
+ interrupt-parent = <&gic>;
+ interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-controller;
+ };
};
rng: hwrng@...e2524 {
--
1.8.3.1
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