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Message-Id: <1573244313-9190-9-git-send-email-eajames@linux.ibm.com>
Date:   Fri,  8 Nov 2019 14:18:29 -0600
From:   Eddie James <eajames@...ux.ibm.com>
To:     linux-kernel@...r.kernel.org
Cc:     linux-aspeed@...ts.ozlabs.org, andrew@...id.au, joel@....id.au,
        maz@...nel.org, jason@...edaemon.net, tglx@...utronix.de,
        robh+dt@...nel.org, mark.rutland@....com,
        devicetree@...r.kernel.org
Subject: [PATCH 08/12] ARM: dts: aspeed: ast2500: Add XDMA Engine

Add a node for the XDMA engine with all the necessary information.

Signed-off-by: Eddie James <eajames@...ux.ibm.com>
---
 arch/arm/boot/dts/aspeed-g5.dtsi | 10 ++++++++++
 1 file changed, 10 insertions(+)

diff --git a/arch/arm/boot/dts/aspeed-g5.dtsi b/arch/arm/boot/dts/aspeed-g5.dtsi
index 4579c78..5fa2744 100644
--- a/arch/arm/boot/dts/aspeed-g5.dtsi
+++ b/arch/arm/boot/dts/aspeed-g5.dtsi
@@ -1,5 +1,6 @@
 // SPDX-License-Identifier: GPL-2.0+
 #include <dt-bindings/clock/aspeed-clock.h>
+#include <dt-bindings/interrupt-controller/aspeed-scu-ic.h>
 
 / {
 	model = "Aspeed BMC";
@@ -259,6 +260,15 @@
 				interrupts = <0x19>;
 			};
 
+			xdma: xdma@...e7000 {
+				compatible = "aspeed,ast2500-xdma";
+				reg = <0x1e6e7000 0x100>;
+				clocks = <&syscon ASPEED_CLK_GATE_BCLK>;
+				resets = <&syscon ASPEED_RESET_XDMA>;
+				interrupts-extended = <&vic 6>, <&scu_ic ASPEED_AST2500_SCU_IC_PCIE_RESET_LO_TO_HI>;
+				status = "disabled";
+			};
+
 			adc: adc@...e9000 {
 				compatible = "aspeed,ast2500-adc";
 				reg = <0x1e6e9000 0xb0>;
-- 
1.8.3.1

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