linux-kernel - Re: [PATCH v2 1/5] dt-bindings: clock: add the Amlogic Meson8 DDR clock controller binding

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Message-Id: <20191108220717.150422084D@mail.kernel.org>
Date:   Fri, 08 Nov 2019 14:07:16 -0800
From:   Stephen Boyd <sboyd@...nel.org>
To:     Martin Blumenstingl <martin.blumenstingl@...glemail.com>,
        jbrunet@...libre.com, khilman@...libre.com,
        linux-amlogic@...ts.infradead.org, narmstrong@...libre.com
Cc:     robh+dt@...nel.org, mark.rutland@....com,
        devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
        linux-arm-kernel@...ts.infradead.org, linux-clk@...r.kernel.org,
        Martin Blumenstingl <martin.blumenstingl@...glemail.com>,
        Rob Herring <robh@...nel.org>
Subject: Re: [PATCH v2 1/5] dt-bindings: clock: add the Amlogic Meson8 DDR clock controller binding

Quoting Martin Blumenstingl (2019-10-27 09:23:24)
> Amlogic Meson8, Meson8b and Meson8m2 SoCs have a DDR clock controller in
> the MMCBUS registers. There is no public documentation on this, but the
> GPL u-boot sources from the Amlogic BSP show that:
> - it uses the same XTAL input as the main clock controller
> - it contains a PLL which seems to be implemented just like the other
>   PLLs in this SoC
> - there is a power-of-two PLL post-divider
> 
> Add the documentation and header file for this DDR clock controller.
> 
> Reviewed-by: Rob Herring <robh@...nel.org>
> Signed-off-by: Martin Blumenstingl <martin.blumenstingl@...glemail.com>
> ---

Acked-by: Stephen Boyd <sboyd@...nel.org>