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Message-Id: <20191110024013.29782-100-sashal@kernel.org>
Date: Sat, 9 Nov 2019 21:38:42 -0500
From: Sasha Levin <sashal@...nel.org>
To: linux-kernel@...r.kernel.org, stable@...r.kernel.org
Cc: Marek Szyprowski <m.szyprowski@...sung.com>,
Krzysztof Kozlowski <krzk@...nel.org>,
Sasha Levin <sashal@...nel.org>, devicetree@...r.kernel.org
Subject: [PATCH AUTOSEL 4.19 100/191] ARM: dts: exynos: Correct audio subsystem parent clock on Peach Chromebooks
From: Marek Szyprowski <m.szyprowski@...sung.com>
[ Upstream commit ff1e37c6809daab75f7b2dea1efe69330e8eb65b ]
The proper parent clock for audio subsystem for Exynos5420 and Exynos5800
SoCs is CLK_MAU_EPLL. This fixes following warning:
clk: failed to reparent mout_audss to fout_epll: -22
Fixes: ed7d1307077e: ARM: dts: exynos: Enable HDMI audio support on Peach Pit
Fixes: bae0f445c1e7: ARM: dts: exynos: Enable HDMI audio support on Peach Pi
Signed-off-by: Marek Szyprowski <m.szyprowski@...sung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@...nel.org>
Signed-off-by: Sasha Levin <sashal@...nel.org>
---
arch/arm/boot/dts/exynos5420-peach-pit.dts | 2 +-
arch/arm/boot/dts/exynos5800-peach-pi.dts | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/exynos5420-peach-pit.dts b/arch/arm/boot/dts/exynos5420-peach-pit.dts
index 25bdc9d97a4df..3e666caa86bfe 100644
--- a/arch/arm/boot/dts/exynos5420-peach-pit.dts
+++ b/arch/arm/boot/dts/exynos5420-peach-pit.dts
@@ -153,7 +153,7 @@
&clock_audss {
assigned-clocks = <&clock_audss EXYNOS_MOUT_AUDSS>;
- assigned-clock-parents = <&clock CLK_FOUT_EPLL>;
+ assigned-clock-parents = <&clock CLK_MAU_EPLL>;
};
&cpu0 {
diff --git a/arch/arm/boot/dts/exynos5800-peach-pi.dts b/arch/arm/boot/dts/exynos5800-peach-pi.dts
index 7989631b39ccf..90222ec19f877 100644
--- a/arch/arm/boot/dts/exynos5800-peach-pi.dts
+++ b/arch/arm/boot/dts/exynos5800-peach-pi.dts
@@ -153,7 +153,7 @@
&clock_audss {
assigned-clocks = <&clock_audss EXYNOS_MOUT_AUDSS>;
- assigned-clock-parents = <&clock CLK_FOUT_EPLL>;
+ assigned-clock-parents = <&clock CLK_MAU_EPLL>;
};
&cpu0 {
--
2.20.1
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