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Message-ID: <20191112191432.GA19579@bogus>
Date: Tue, 12 Nov 2019 13:14:32 -0600
From: Rob Herring <robh@...nel.org>
To: Rahul Tanwar <rahul.tanwar@...ux.intel.com>
Cc: linus.walleij@...aro.org, mark.rutland@....com,
linux-gpio@...r.kernel.org, linux-kernel@...r.kernel.org,
devicetree@...r.kernel.org, andriy.shevchenko@...el.com,
qi-ming.wu@...el.com, yixin.zhu@...ux.intel.com,
cheol.yong.kim@...el.com
Subject: Re: [PATCH v6 2/2] dt-bindings: pinctrl: intel: Add for new SoC
On Mon, Nov 11, 2019 at 06:11:30PM +0800, Rahul Tanwar wrote:
> Add dt bindings document for pinmux & GPIO controller driver of
> Intel Lightning Mountain SoC.
>
> Signed-off-by: Rahul Tanwar <rahul.tanwar@...ux.intel.com>
> ---
> .../bindings/pinctrl/intel,lgm-pinctrl.yaml | 98 ++++++++++++++++++++++
> 1 file changed, 98 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/pinctrl/intel,lgm-pinctrl.yaml
>
> diff --git a/Documentation/devicetree/bindings/pinctrl/intel,lgm-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/intel,lgm-pinctrl.yaml
> new file mode 100644
> index 000000000000..d54a3bda1f4f
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/pinctrl/intel,lgm-pinctrl.yaml
> @@ -0,0 +1,98 @@
> +# SPDX-License-Identifier: GPL-2.0-only
For new bindings:
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/bindings/pinctrl/intel,lgm-pinctrl.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Intel Lightning Mountain SoC pinmux & GPIO controller binding
> +
> +maintainers:
> + - Rahul Tanwar <rahul.tanwar@...ux.intel.com>
> +
> +description: |
> + Pinmux & GPIO controller controls pin multiplexing & configuration including
> + GPIO function selection & GPIO attributes configuration.
> +
> + Please refer to [1] for details of the common pinctrl bindings used by the
> + client devices.
> +
> + [1] Documentation/devicetree/bindings/pinctrl/pinctrl-bindings.txt
> +
> +properties:
> + compatible:
> + const: intel,lgm-pinctrl
> +
> + reg:
> + maxItems: 1
> +
> +# Client device subnode's properties
> +patternProperties:
> + '-pins$':
> + type: object
> + description:
> + Pinctrl node's client devices use subnodes for desired pin configuration.
> + Client device subnodes use below standard properties.
> +
> + properties:
> + function:
> + $ref: /schemas/types.yaml#/definitions/string
> + description:
> + A string containing the name of the function to mux to the group.
Possible strings should be listed out here.
> +
> + groups:
> + $ref: /schemas/types.yaml#/definitions/string-array
> + description:
> + An array of strings identifying the list of groups.
Possible strings should be listed out here.
> +
> + pins:
> + $ref: /schemas/types.yaml#/definitions/uint32-array
> + description:
> + List of pins to select with this function.
> +
> + pinmux:
> + description: The applicable mux group.
> + allOf:
> + - $ref: "/schemas/types.yaml#/definitions/uint32-array"
> +
> + bias-pull-up:
> + type: boolean
> + bias-pull-down:
> + type: boolean
> + drive-strength:
> + type: boolean
Not a boolean. Need to define possible values.
> + slew-rate:
> + type: boolean
Not a boolean. Need to define possible values.
> + drive-open-drain:
> + type: boolean
> + output-enable:
> + type: boolean
> +
> + required:
> + - function
> + - groups
For the -pins nodes too:
additionalProperties: false
> +
> +required:
> + - compatible
> + - reg
> +
> +additionalProperties: false
> +
> +examples:
> + # Pinmux controller node
> + - |
> + pinctrl: pinctrl@...80000 {
> + compatible = "intel,lgm-pinctrl";
> + reg = <0xe2880000 0x100000>;
> +
> + # Client device subnode
> + uart0-pins: uart0 {
This fails 'make dt_binding_check'. Please fix and run that.
> + pins = <64>, /* UART_RX0 */
> + <65>; /* UART_TX0 */
> + function = "CONSOLE_UART0";
> + pinmux = <1>,
> + <1>;
> + groups = "CONSOLE_UART0";
> + };
> + };
> +
> +...
> --
> 2.11.0
>
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