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Date:   Tue, 12 Nov 2019 09:24:07 +0200
From:   Peter Ujfalusi <peter.ujfalusi@...com>
To:     Vinod Koul <vkoul@...nel.org>
CC:     <robh+dt@...nel.org>, <nm@...com>, <ssantosh@...nel.org>,
        <dan.j.williams@...el.com>, <dmaengine@...r.kernel.org>,
        <linux-arm-kernel@...ts.infradead.org>,
        <devicetree@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
        <grygorii.strashko@...com>, <lokeshvutla@...com>,
        <t-kristo@...com>, <tony@...mide.com>, <j-keerthy@...com>
Subject: Re: [PATCH v4 12/15] dmaengine: ti: New driver for K3 UDMA - split#4:
 dma_device callbacks 1



On 12/11/2019 7.36, Vinod Koul wrote:
> On 11-11-19, 12:29, Peter Ujfalusi wrote:
>> On 11/11/2019 8.09, Vinod Koul wrote:
>>> On 01-11-19, 10:41, Peter Ujfalusi wrote:
> 
>>>> +static enum dma_status udma_tx_status(struct dma_chan *chan,
>>>> +				      dma_cookie_t cookie,
>>>> +				      struct dma_tx_state *txstate)
>>>> +{
>>>> +	struct udma_chan *uc = to_udma_chan(chan);
>>>> +	enum dma_status ret;
>>>> +	unsigned long flags;
>>>> +
>>>> +	spin_lock_irqsave(&uc->vc.lock, flags);
>>>> +
>>>> +	ret = dma_cookie_status(chan, cookie, txstate);
>>>> +
>>>> +	if (!udma_is_chan_running(uc))
>>>> +		ret = DMA_COMPLETE;
>>>
>>> so a paused channel will result in dma complete status?
>>
>> The channel is still enabled (running), the pause only sets a bit in the
>> channel's real time control register.
> 
> Okay and which cases will channel not be running i.e., you return
> DMA_COMPLETE above?

After terminate_all or before the first issue_pending call. When the
channel is disabled.

- Péter

Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki.
Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki

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