lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Date:   Tue, 12 Nov 2019 20:59:56 +0800
From:   Icenowy Zheng <icenowy@...c.io>
To:     linux-arm-kernel@...ts.infradead.org,
        Maxime Ripard <mripard@...nel.org>,
        Tian Yunhao <t123yh@...look.com>
CC:     Stephen Boyd <sboyd@...nel.org>,
        Michael Turquette <mturquette@...libre.com>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        Chen-Yu Tsai <wens@...e.org>,
        "linux-clk@...r.kernel.org" <linux-clk@...r.kernel.org>,
        "linux-arm-kernel@...ts.infradead.org" 
        <linux-arm-kernel@...ts.infradead.org>
Subject: Re: [PATCH] clk: sunxi-ng: v3s: Fix incorrect number of hw_clks.



于 2019年11月11日 GMT+08:00 下午8:39:36, Maxime Ripard <mripard@...nel.org> 写到:
>Hi,
>
>Thanks for your patch
>
>On Sat, Nov 09, 2019 at 03:19:09PM +0000, Tian Yunhao wrote:
>> The hws field of sun8i_v3s_hw_clks has only 74
>> members. However, the number specified by CLK_NUMBER
>> is 77 (= CLK_I2S0 + 1). This leads to runtime segmentation
>> fault that is not always reproducible.
>>
>> This patch adds a protective field [CLK_NUMBER] which ensures
>> ARRAY_SIZE(.hws) is always greater than .num, thus eliminates
>> this error.
>>
>> Signed-off-by: Yunhao Tian <t123yh@...look.com>
>> ---
>>  drivers/clk/sunxi-ng/ccu-sun8i-v3s.c | 2 ++
>>  1 file changed, 2 insertions(+)
>>
>> diff --git a/drivers/clk/sunxi-ng/ccu-sun8i-v3s.c
>b/drivers/clk/sunxi-ng/ccu-sun8i-v3s.c
>> index 5c779eec454b..de7fce7f32e6 100644
>> --- a/drivers/clk/sunxi-ng/ccu-sun8i-v3s.c
>> +++ b/drivers/clk/sunxi-ng/ccu-sun8i-v3s.c
>> @@ -617,6 +617,7 @@ static struct clk_hw_onecell_data
>sun8i_v3s_hw_clks = {
>>  		[CLK_AVS]		= &avs_clk.common.hw,
>>  		[CLK_MBUS]		= &mbus_clk.common.hw,
>>  		[CLK_MIPI_CSI]		= &mipi_csi_clk.common.hw,
>> +		[CLK_NUMBER]    = NULL,
>>  	},
>>  	.num	= CLK_NUMBER,
>>  };
>> @@ -699,6 +700,7 @@ static struct clk_hw_onecell_data
>sun8i_v3_hw_clks = {
>>  		[CLK_AVS]		= &avs_clk.common.hw,
>>  		[CLK_MBUS]		= &mbus_clk.common.hw,
>>  		[CLK_MIPI_CSI]		= &mipi_csi_clk.common.hw,
>> +		[CLK_NUMBER]    = NULL,
>>  	},
>>  	.num	= CLK_NUMBER,
>
>I'd rather have the number of clocks (.num) being properly set.

However the maximum clock indices number is different on V3s and V3, because
on V3s the last clock is missing.

Should we define CLK_NUMBER_V3S here?

>
>Maxime

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ