[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <20191112143301.3168-10-peter.ujfalusi@ti.com>
Date: Tue, 12 Nov 2019 16:33:01 +0200
From: Peter Ujfalusi <peter.ujfalusi@...com>
To: <t-kristo@...com>, <nm@...com>
CC: <robh+dt@...nel.org>, <mark.rutland@....com>,
<linux-arm-kernel@...ts.infradead.org>,
<devicetree@...r.kernel.org>, <linux-kernel@...r.kernel.org>
Subject: [PATCH 9/9] arm64: dts: ti: k3-j721e-main: Add McASP nodes
Add the nodes for McASP 0-11 and keep them disabled because several
required properties are not present as they are board specific.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@...com>
---
arch/arm64/boot/dts/ti/k3-j721e-main.dtsi | 228 ++++++++++++++++++++++
1 file changed, 228 insertions(+)
diff --git a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi
index 66583625dc95..276ac946d8d8 100644
--- a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi
@@ -636,4 +636,232 @@ usb1: usb@...0000 {
dr_mode = "otg";
};
};
+
+ mcasp0: mcasp@...00000 {
+ compatible = "ti,am33xx-mcasp-audio";
+ reg = <0x0 0x02b00000 0x0 0x2000>,
+ <0x0 0x02b08000 0x0 0x1000>;
+ reg-names = "mpu","dat";
+ interrupts = <GIC_SPI 544 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 545 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "tx", "rx";
+
+ dmas = <&main_udmap 0xc400>, <&main_udmap 0x4400>;
+ dma-names = "tx", "rx";
+
+ clocks = <&k3_clks 174 1>;
+ clock-names = "fck";
+ power-domains = <&k3_pds 174 TI_SCI_PD_EXCLUSIVE>;
+
+ status = "disabled";
+ };
+
+ mcasp1: mcasp@...10000 {
+ compatible = "ti,am33xx-mcasp-audio";
+ reg = <0x0 0x02b10000 0x0 0x2000>,
+ <0x0 0x02b18000 0x0 0x1000>;
+ reg-names = "mpu","dat";
+ interrupts = <GIC_SPI 546 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 547 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "tx", "rx";
+
+ dmas = <&main_udmap 0xc401>, <&main_udmap 0x4401>;
+ dma-names = "tx", "rx";
+
+ clocks = <&k3_clks 175 1>;
+ clock-names = "fck";
+ power-domains = <&k3_pds 175 TI_SCI_PD_EXCLUSIVE>;
+
+ status = "disabled";
+ };
+
+ mcasp2: mcasp@...20000 {
+ compatible = "ti,am33xx-mcasp-audio";
+ reg = <0x0 0x02b20000 0x0 0x2000>,
+ <0x0 0x02b28000 0x0 0x1000>;
+ reg-names = "mpu","dat";
+ interrupts = <GIC_SPI 548 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 549 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "tx", "rx";
+
+ dmas = <&main_udmap 0xc402>, <&main_udmap 0x4402>;
+ dma-names = "tx", "rx";
+
+ clocks = <&k3_clks 176 1>;
+ clock-names = "fck";
+ power-domains = <&k3_pds 176 TI_SCI_PD_EXCLUSIVE>;
+
+ status = "disabled";
+ };
+
+ mcasp3: mcasp@...30000 {
+ compatible = "ti,am33xx-mcasp-audio";
+ reg = <0x0 0x02b30000 0x0 0x2000>,
+ <0x0 0x02b38000 0x0 0x1000>;
+ reg-names = "mpu","dat";
+ interrupts = <GIC_SPI 550 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 551 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "tx", "rx";
+
+ dmas = <&main_udmap 0xc500>, <&main_udmap 0x4500>;
+ dma-names = "tx", "rx";
+
+ clocks = <&k3_clks 177 1>;
+ clock-names = "fck";
+ power-domains = <&k3_pds 177 TI_SCI_PD_EXCLUSIVE>;
+
+ status = "disabled";
+ };
+
+ mcasp4: mcasp@...40000 {
+ compatible = "ti,am33xx-mcasp-audio";
+ reg = <0x0 0x02b40000 0x0 0x2000>,
+ <0x0 0x02b48000 0x0 0x1000>;
+ reg-names = "mpu","dat";
+ interrupts = <GIC_SPI 552 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 553 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "tx", "rx";
+
+ dmas = <&main_udmap 0xc501>, <&main_udmap 0x4501>;
+ dma-names = "tx", "rx";
+
+ clocks = <&k3_clks 178 1>;
+ clock-names = "fck";
+ power-domains = <&k3_pds 178 TI_SCI_PD_EXCLUSIVE>;
+
+ status = "disabled";
+ };
+
+ mcasp5: mcasp@...50000 {
+ compatible = "ti,am33xx-mcasp-audio";
+ reg = <0x0 0x02b50000 0x0 0x2000>,
+ <0x0 0x02b58000 0x0 0x1000>;
+ reg-names = "mpu","dat";
+ interrupts = <GIC_SPI 554 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 555 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "tx", "rx";
+
+ dmas = <&main_udmap 0xc502>, <&main_udmap 0x4502>;
+ dma-names = "tx", "rx";
+
+ clocks = <&k3_clks 179 1>;
+ clock-names = "fck";
+ power-domains = <&k3_pds 179 TI_SCI_PD_EXCLUSIVE>;
+
+ status = "disabled";
+ };
+
+ mcasp6: mcasp@...60000 {
+ compatible = "ti,am33xx-mcasp-audio";
+ reg = <0x0 0x02b60000 0x0 0x2000>,
+ <0x0 0x02b68000 0x0 0x1000>;
+ reg-names = "mpu","dat";
+ interrupts = <GIC_SPI 556 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 557 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "tx", "rx";
+
+ dmas = <&main_udmap 0xc503>, <&main_udmap 0x4503>;
+ dma-names = "tx", "rx";
+
+ clocks = <&k3_clks 180 1>;
+ clock-names = "fck";
+ power-domains = <&k3_pds 180 TI_SCI_PD_EXCLUSIVE>;
+
+ status = "disabled";
+ };
+
+ mcasp7: mcasp@...70000 {
+ compatible = "ti,am33xx-mcasp-audio";
+ reg = <0x0 0x02b70000 0x0 0x2000>,
+ <0x0 0x02b78000 0x0 0x1000>;
+ reg-names = "mpu","dat";
+ interrupts = <GIC_SPI 558 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 559 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "tx", "rx";
+
+ dmas = <&main_udmap 0xc504>, <&main_udmap 0x4504>;
+ dma-names = "tx", "rx";
+
+ clocks = <&k3_clks 181 1>;
+ clock-names = "fck";
+ power-domains = <&k3_pds 181 TI_SCI_PD_EXCLUSIVE>;
+
+ status = "disabled";
+ };
+
+ mcasp8: mcasp@...80000 {
+ compatible = "ti,am33xx-mcasp-audio";
+ reg = <0x0 0x02b80000 0x0 0x2000>,
+ <0x0 0x02b88000 0x0 0x1000>;
+ reg-names = "mpu","dat";
+ interrupts = <GIC_SPI 560 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 561 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "tx", "rx";
+
+ dmas = <&main_udmap 0xc505>, <&main_udmap 0x4505>;
+ dma-names = "tx", "rx";
+
+ clocks = <&k3_clks 182 1>;
+ clock-names = "fck";
+ power-domains = <&k3_pds 182 TI_SCI_PD_EXCLUSIVE>;
+
+ status = "disabled";
+ };
+
+ mcasp9: mcasp@...90000 {
+ compatible = "ti,am33xx-mcasp-audio";
+ reg = <0x0 0x02b90000 0x0 0x2000>,
+ <0x0 0x02b98000 0x0 0x1000>;
+ reg-names = "mpu","dat";
+ interrupts = <GIC_SPI 562 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 563 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "tx", "rx";
+
+ dmas = <&main_udmap 0xc506>, <&main_udmap 0x4506>;
+ dma-names = "tx", "rx";
+
+ clocks = <&k3_clks 183 1>;
+ clock-names = "fck";
+ power-domains = <&k3_pds 183 TI_SCI_PD_EXCLUSIVE>;
+
+ status = "disabled";
+ };
+
+ mcasp10: mcasp@...a0000 {
+ compatible = "ti,am33xx-mcasp-audio";
+ reg = <0x0 0x02ba0000 0x0 0x2000>,
+ <0x0 0x02ba8000 0x0 0x1000>;
+ reg-names = "mpu","dat";
+ interrupts = <GIC_SPI 564 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 565 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "tx", "rx";
+
+ dmas = <&main_udmap 0xc507>, <&main_udmap 0x4507>;
+ dma-names = "tx", "rx";
+
+ clocks = <&k3_clks 184 1>;
+ clock-names = "fck";
+ power-domains = <&k3_pds 184 TI_SCI_PD_EXCLUSIVE>;
+
+ status = "disabled";
+ };
+
+ mcasp11: mcasp@...b0000 {
+ compatible = "ti,am33xx-mcasp-audio";
+ reg = <0x0 0x02bb0000 0x0 0x2000>,
+ <0x0 0x02bb8000 0x0 0x1000>;
+ reg-names = "mpu","dat";
+ interrupts = <GIC_SPI 566 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 567 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "tx", "rx";
+
+ dmas = <&main_udmap 0xc508>, <&main_udmap 0x4508>;
+ dma-names = "tx", "rx";
+
+ clocks = <&k3_clks 185 1>;
+ clock-names = "fck";
+ power-domains = <&k3_pds 185 TI_SCI_PD_EXCLUSIVE>;
+
+ status = "disabled";
+ };
};
--
Peter
Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki.
Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki
Powered by blists - more mailing lists