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Message-Id: <20191113222116.E5E9B206E3@mail.kernel.org>
Date:   Wed, 13 Nov 2019 14:21:15 -0800
From:   Stephen Boyd <sboyd@...nel.org>
To:     Manivannan Sadhasivam <manivannan.sadhasivam@...aro.org>,
        mturquette@...libre.com, robh+dt@...nel.org
Cc:     linux-clk@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
        linux-kernel@...r.kernel.org, devicetree@...r.kernel.org,
        haitao.suo@...main.com, darren.tsao@...main.com,
        fisher.cheng@...main.com, alec.lin@...main.com,
        Manivannan Sadhasivam <manivannan.sadhasivam@...aro.org>
Subject: Re: [PATCH v6 0/7] Add Bitmain BM1880 clock driver

Quoting Manivannan Sadhasivam (2019-10-26 04:02:46)
> Hello,
> 
> This patchset adds common clock driver for Bitmain BM1880 SoC clock
> controller. The clock controller consists of gate, divider, mux
> and pll clocks with different compositions. Hence, the driver uses
> composite clock structure in place where multiple clocking units are
> combined together.
> 
> This patchset also removes UART fixed clock and sources clocks from clock
> controller for Sophon Edge board where the driver has been validated.
> 

Are you waiting for review here? I see some kbuild reports so I assumed
you would fix and resend.

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