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Message-Id: <cover.1573613534.git.eswara.kota@linux.intel.com>
Date:   Wed, 13 Nov 2019 15:21:19 +0800
From:   Dilip Kota <eswara.kota@...ux.intel.com>
To:     gustavo.pimentel@...opsys.com, lorenzo.pieralisi@....com,
        andrew.murray@....com, helgaas@...nel.org, jingoohan1@...il.com,
        robh@...nel.org, martin.blumenstingl@...glemail.com,
        linux-pci@...r.kernel.org, devicetree@...r.kernel.org,
        andriy.shevchenko@...el.com
Cc:     linux-kernel@...r.kernel.org, cheol.yong.kim@...el.com,
        chuanhua.lei@...ux.intel.com, qi-ming.wu@...el.com,
        Dilip Kota <eswara.kota@...ux.intel.com>
Subject: [PATCH v6 0/3] PCI: Add Intel PCIe Driver and respective dt-binding yaml file

Intel PCIe is Synopsys based controller. Intel PCIe driver uses
DesignWare PCIe framework for host initialization and register
configurations.

Changes on v6:
	Add Reviewed by tags for all the patches.
	Address review comments for all the patches.

Dilip Kota (3):
  dt-bindings: PCI: intel: Add YAML schemas for the PCIe RC controller
  dwc: PCI: intel: PCIe RC controller driver
  PCI: artpec6: Configure FTS with dwc helper function

 .../devicetree/bindings/pci/intel-gw-pcie.yaml     | 138 ++++++
 drivers/pci/controller/dwc/Kconfig                 |  10 +
 drivers/pci/controller/dwc/Makefile                |   1 +
 drivers/pci/controller/dwc/pcie-artpec6.c          |   8 +-
 drivers/pci/controller/dwc/pcie-designware.c       |  57 +++
 drivers/pci/controller/dwc/pcie-designware.h       |  12 +
 drivers/pci/controller/dwc/pcie-intel-gw.c         | 546 +++++++++++++++++
 include/uapi/linux/pci_regs.h                      |   1 +
 8 files changed, 766 insertions(+), 7 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/pci/intel-gw-pcie.yaml
 create mode 100644 drivers/pci/controller/dwc/pcie-intel-gw.c

-- 
2.11.0

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