linux-kernel - Re: [PATCH 09/12] riscv: clear the instruction cache and all registers when booting

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Message-ID: <alpine.DEB.2.21.9999.1911132344530.11342@viisi.sifive.com>
Date:   Wed, 13 Nov 2019 23:45:10 -0800 (PST)
From:   Paul Walmsley <paul.walmsley@...ive.com>
To:     Christoph Hellwig <hch@....de>
cc:     Palmer Dabbelt <palmer@...ive.com>,
        Damien Le Moal <damien.lemoal@....com>,
        linux-riscv@...ts.infradead.org, linux-kernel@...r.kernel.org,
        Anup Patel <anup@...infault.org>
Subject: Re: [PATCH 09/12] riscv: clear the instruction cache and all registers
 when booting

On Mon, 28 Oct 2019, Christoph Hellwig wrote:

> When we get booted we want a clear slate without any leaks from previous
> supervisors or the firmware.  Flush the instruction cache and then clear
> all registers to known good values.  This is really important for the
> upcoming nommu support that runs on M-mode, but can't really harm when
> running in S-mode either.  Vaguely based on the concepts from opensbi.
> 
> Signed-off-by: Christoph Hellwig <hch@....de>
> Reviewed-by: Anup Patel <anup@...infault.org>

Thanks, queued for v5.5-rc1.

- Paul