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Message-ID: <CAOCk7Nrap3y_NS8RMuqeLr+E5CP94xyqEBZfHBCtvocaTM1VVA@mail.gmail.com>
Date: Thu, 14 Nov 2019 10:56:19 -0700
From: Jeffrey Hugo <jeffrey.l.hugo@...il.com>
To: Rob Clark <robdclark@...il.com>
Cc: Harigovindan P <harigovi@...eaurora.org>,
"open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS"
<devicetree@...r.kernel.org>,
linux-arm-msm <linux-arm-msm@...r.kernel.org>,
Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
dri-devel <dri-devel@...ts.freedesktop.org>,
nganji@...eaurora.org, Sean Paul <seanpaul@...omium.org>,
Abhinav Kumar <abhinavk@...eaurora.org>,
"Kristian H. Kristensen" <hoegsberg@...omium.org>,
freedreno <freedreno@...ts.freedesktop.org>,
Jeykumar Sankaran <jsanka@...eaurora.org>,
Chandan Uddaraju <chandanu@...eaurora.org>
Subject: Re: [Freedreno] [PATCH v1 2/2] drm/msm: add DSI config changes to
support DSI version
On Thu, Nov 14, 2019 at 10:47 AM Rob Clark <robdclark@...il.com> wrote:
>
> On Thu, Nov 14, 2019 at 2:16 AM Harigovindan P <harigovi@...eaurora.org> wrote:
> >
> > Add DSI config changes to support DSI version.
> >
> > Signed-off-by: Harigovindan P <harigovi@...eaurora.org>
>
> Reviewed-by: Rob Clark <robdclark@...il.com>
Can we fix the subject/commit text for this to indicate what DSI
version and/or SoC this is for? This is a SoC enablement patch, but
at first I thought this was some bug fix or something.
>
> For patch 1/2 with the panel driver, probably best to split that out
> into a different patch(set), since panel drivers are merged into
> drm-next via a different tree
>
> BR,
> -R
>
> > ---
> > drivers/gpu/drm/msm/dsi/dsi_cfg.c | 21 +++++++++++++++++++++
> > drivers/gpu/drm/msm/dsi/dsi_cfg.h | 1 +
> > 2 files changed, 22 insertions(+)
> >
> > diff --git a/drivers/gpu/drm/msm/dsi/dsi_cfg.c b/drivers/gpu/drm/msm/dsi/dsi_cfg.c
> > index b7b7c1a..d2c4592 100644
> > --- a/drivers/gpu/drm/msm/dsi/dsi_cfg.c
> > +++ b/drivers/gpu/drm/msm/dsi/dsi_cfg.c
> > @@ -133,6 +133,10 @@ static const char * const dsi_sdm845_bus_clk_names[] = {
> > "iface", "bus",
> > };
> >
> > +static const char * const dsi_sc7180_bus_clk_names[] = {
> > + "iface", "bus",
> > +};
> > +
> > static const struct msm_dsi_config sdm845_dsi_cfg = {
> > .io_offset = DSI_6G_REG_SHIFT,
> > .reg_cfg = {
> > @@ -147,6 +151,20 @@ static const struct msm_dsi_config sdm845_dsi_cfg = {
> > .num_dsi = 2,
> > };
> >
> > +static const struct msm_dsi_config sc7180_dsi_cfg = {
> > + .io_offset = DSI_6G_REG_SHIFT,
> > + .reg_cfg = {
> > + .num = 1,
> > + .regs = {
> > + {"vdda", 21800, 4 }, /* 1.2 V */
> > + },
> > + },
> > + .bus_clk_names = dsi_sc7180_bus_clk_names,
> > + .num_bus_clks = ARRAY_SIZE(dsi_sc7180_bus_clk_names),
> > + .io_start = { 0xae94000 },
> > + .num_dsi = 1,
> > +};
> > +
> > const static struct msm_dsi_host_cfg_ops msm_dsi_v2_host_ops = {
> > .link_clk_enable = dsi_link_clk_enable_v2,
> > .link_clk_disable = dsi_link_clk_disable_v2,
> > @@ -201,6 +219,9 @@ static const struct msm_dsi_cfg_handler dsi_cfg_handlers[] = {
> > &msm8998_dsi_cfg, &msm_dsi_6g_v2_host_ops},
> > {MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V2_2_1,
> > &sdm845_dsi_cfg, &msm_dsi_6g_v2_host_ops},
> > + {MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V2_4_1,
> > + &sc7180_dsi_cfg, &msm_dsi_6g_v2_host_ops},
> > +
> > };
> >
> > const struct msm_dsi_cfg_handler *msm_dsi_cfg_get(u32 major, u32 minor)
> > diff --git a/drivers/gpu/drm/msm/dsi/dsi_cfg.h b/drivers/gpu/drm/msm/dsi/dsi_cfg.h
> > index e2b7a7d..9919536 100644
> > --- a/drivers/gpu/drm/msm/dsi/dsi_cfg.h
> > +++ b/drivers/gpu/drm/msm/dsi/dsi_cfg.h
> > @@ -19,6 +19,7 @@
> > #define MSM_DSI_6G_VER_MINOR_V1_4_1 0x10040001
> > #define MSM_DSI_6G_VER_MINOR_V2_2_0 0x20000000
> > #define MSM_DSI_6G_VER_MINOR_V2_2_1 0x20020001
> > +#define MSM_DSI_6G_VER_MINOR_V2_4_1 0x20040001
> >
> > #define MSM_DSI_V2_VER_MINOR_8064 0x0
> >
> > --
> > 2.7.4
> >
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