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Message-Id: <20191115180825.10526-1-matwey@sai.msu.ru>
Date: Fri, 15 Nov 2019 21:08:21 +0300
From: "Matwey V. Kornilov" <matwey@....msu.ru>
To: unlisted-recipients:; (no To-header on input)
Cc: matwey.kornilov@...il.com,
"Matwey V. Kornilov" <matwey@....msu.ru>,
Rob Herring <robh+dt@...nel.org>,
Mark Rutland <mark.rutland@....com>,
Heiko Stuebner <heiko@...ech.de>,
Ezequiel Garcia <ezequiel@...labora.com>,
Akash Gajjar <akash@...nedev.com>,
devicetree@...r.kernel.org (open list:OPEN FIRMWARE AND FLATTENED
DEVICE TREE BINDINGS),
linux-arm-kernel@...ts.infradead.org (moderated list:ARM/Rockchip SoC
support),
linux-rockchip@...ts.infradead.org (open list:ARM/Rockchip SoC support),
linux-kernel@...r.kernel.org (open list)
Subject: [PATCH] arm64: dts: rockchip: Enable PCIe for Radxa Rock Pi 4 board
Radxa Rock Pi 4 is equipped with M.2 PCIe slot,
so enable PCIe for the board.
The changes has been tested with Intel SSD 660p series device.
01:00.0 Class 0108: Device 8086:f1a8 (rev 03)
Signed-off-by: Matwey V. Kornilov <matwey@....msu.ru>
---
arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4.dts | 14 ++++++++++++++
1 file changed, 14 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4.dts b/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4.dts
index 1ae1ebd4efdd..9c2927faba41 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4.dts
@@ -463,6 +463,20 @@
pmu1830-supply = <&vcc_3v0>;
};
+&pcie_phy {
+ status = "okay";
+};
+
+&pcie0 {
+ status = "okay";
+
+ ep-gpios = <&gpio4 RK_PD3 GPIO_ACTIVE_HIGH>;
+ num-lanes = <4>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pcie_clkreqnb_cpm>;
+ max-link-speed = <2>;
+};
+
&pinctrl {
bt {
bt_enable_h: bt-enable-h {
--
2.16.4
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