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Message-Id: <83394ae827ce7c123228b749bcae2a2c470e88a4.1573814758.git.saiprakash.ranjan@codeaurora.org>
Date: Fri, 15 Nov 2019 16:29:11 +0530
From: Sai Prakash Ranjan <saiprakash.ranjan@...eaurora.org>
To: Stephen Boyd <swboyd@...omium.org>, bjorn.andersson@...aro.org,
Andy Gross <agross@...nel.org>,
Rob Herring <robh+dt@...nel.org>, devicetree@...r.kernel.org
Cc: linux-kernel@...r.kernel.org, linux-arm-msm@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org,
Rajendra Nayak <rnayak@...eaurora.org>,
Rishabh Bhatnagar <rishabhb@...eaurora.org>,
Doug Anderson <dianders@...omium.org>,
Sai Prakash Ranjan <saiprakash.ranjan@...eaurora.org>
Subject: [PATCH 1/2] dt-bindings: msm: Rename cache-controller to system-cache-controller
DT schema checks for the node name 'cache-controller' and enforces
that there has to be a cache-level associated with it. But LLCC is
a system cache and does not have a cache-level property and hence
the dt binding check fails. So let us rename the LLCC cache-controller
to system-cache-controller which is the proper description and also
makes the schema happy.
Suggested-by: Stephen Boyd <swboyd@...omium.org>
Signed-off-by: Sai Prakash Ranjan <saiprakash.ranjan@...eaurora.org>
---
Documentation/devicetree/bindings/arm/msm/qcom,llcc.yaml | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/arm/msm/qcom,llcc.yaml b/Documentation/devicetree/bindings/arm/msm/qcom,llcc.yaml
index 558749065b97..79902f470e4b 100644
--- a/Documentation/devicetree/bindings/arm/msm/qcom,llcc.yaml
+++ b/Documentation/devicetree/bindings/arm/msm/qcom,llcc.yaml
@@ -47,7 +47,7 @@ examples:
- |
#include <dt-bindings/interrupt-controller/arm-gic.h>
- cache-controller@...0000 {
+ system-cache-controller@...0000 {
compatible = "qcom,sdm845-llcc";
reg = <0x1100000 0x200000>, <0x1300000 0x50000> ;
reg-names = "llcc_base", "llcc_broadcast_base";
--
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