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Message-ID: <faa9924a-1c61-349c-9c35-da83fd0b3547@suse.de>
Date: Fri, 15 Nov 2019 12:15:50 +0100
From: Andreas Färber <afaerber@...e.de>
To: Rob Herring <robh@...nel.org>
Cc: Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
Uwe Kleine-König <u.kleine-koenig@...gutronix.de>,
Geert Uytterhoeven <geert+renesas@...der.be>,
linux-realtek-soc@...ts.infradead.org,
Tony Lindgren <tony@...mide.com>,
Linus Walleij <linus.walleij@...aro.org>,
Bjorn Andersson <bjorn.andersson@...aro.org>,
Thierry Reding <thierry.reding@...il.com>,
Fabio Estevam <festevam@...il.com>,
Kevin Hilman <khilman@...libre.com>,
"Rafael J. Wysocki" <rafael@...nel.org>,
Michal Simek <michal.simek@...inx.com>,
Jonathan Hunter <jonathanh@...dia.com>,
NXP Linux Team <linux-imx@....com>,
Sascha Hauer <s.hauer@...gutronix.de>,
"linux-tegra@...r.kernel.org" <linux-tegra@...r.kernel.org>,
"open list:ARM/Amlogic Meson..." <linux-amlogic@...ts.infradead.org>,
Lee Jones <lee.jones@...aro.org>,
linux-omap <linux-omap@...r.kernel.org>,
Alexander Sverdlin <alexander.sverdlin@...il.com>,
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"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
Hartley Sweeten <hsweeten@...ionengravers.com>,
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Shawn Guo <shawnguo@...nel.org>,
Architecture Mailman List <boot-architecture@...ts.linaro.org>,
U-Boot <u-boot@...ts.denx.de>
Subject: Re: Sense of soc bus? (was: [PATCH] base: soc: Export
soc_device_to_device() helper)
Am 14.11.19 um 23:09 schrieb Rob Herring:
> On Tue, Nov 12, 2019 at 4:47 AM Andreas Färber <afaerber@...e.de> wrote:
>> On the other hand, one might argue that such information should just be
>> parsed by EBBR-conformant bootloaders and be passed to the kernel via
>> standard UEFI interfaces and DMI tables. But I'm not aware of Barebox
>> having implemented any of that yet, and even for U-Boot (e.g., Realtek
>> based consumer devices...) not everyone has the GPL sources or tools to
>> update their bootloader. So, having the kernel we control gather
>> information relevant to kernel developers does make some sense to me.
>
> UEFI and DMI are orthogonal, right. You can't expect DMI on a UEFI+DT system.
Not sure, that's why I CC'ed the EBBR folks for input. If it's not
mandatory today, the next revision of EBBR could just require it - if
that's the unified way between SBBR and EBBR. Little point in doing it
only for EBBR.
On my UEFI+DT based Raspberry Pi 3 Model B I do see it, note the
non-filled Processor Information delivered by U-Boot:
raspi3:~ # dmidecode
# dmidecode 3.2
Getting SMBIOS data from sysfs.
SMBIOS 3.0 present.
7 structures occupying 253 bytes.
Table at 0x3CB3E020.
Handle 0x0000, DMI type 0, 24 bytes
BIOS Information
Vendor: U-Boot
Version: 2019.10
Release Date: 10/26/2019
ROM Size: 64 kB
Characteristics:
PCI is supported
BIOS is upgradeable
Selectable boot is supported
I2O boot is supported
Targeted content distribution is supported
Handle 0x0001, DMI type 1, 27 bytes
System Information
Manufacturer: raspberrypi
Product Name: rpi
Version: Not Specified
Serial Number: 00000000********
UUID: 30303030-3030-3030-6437-623461336666
Wake-up Type: Reserved
SKU Number: Not Specified
Family: Not Specified
Handle 0x0002, DMI type 2, 14 bytes
Base Board Information
Manufacturer: raspberrypi
Product Name: rpi
Version: Not Specified
Serial Number: Not Specified
Asset Tag: Not Specified
Features:
Board is a hosting board
Location In Chassis: Not Specified
Chassis Handle: 0x0000
Type: Motherboard
Handle 0x0003, DMI type 3, 21 bytes
Chassis Information
Manufacturer: raspberrypi
Type: Desktop
Lock: Not Present
Version: Not Specified
Serial Number: Not Specified
Asset Tag: Not Specified
Boot-up State: Safe
Power Supply State: Safe
Thermal State: Safe
Security Status: None
OEM Information: 0x00000000
Height: Unspecified
Number Of Power Cords: Unspecified
Contained Elements: 0
Handle 0x0004, DMI type 4, 48 bytes
Processor Information
Socket Designation: Not Specified
Type: Central Processor
Family: Unknown
Manufacturer: Unknown
ID: 00 00 00 00 00 00 00 00
Version: Unknown
Voltage: Unknown
External Clock: Unknown
Max Speed: Unknown
Current Speed: Unknown
Status: Unpopulated
Upgrade: None
L1 Cache Handle: Not Provided
L2 Cache Handle: Not Provided
L3 Cache Handle: Not Provided
Serial Number: Not Specified
Asset Tag: Not Specified
Part Number: Not Specified
Characteristics: None
Handle 0x0005, DMI type 32, 11 bytes
System Boot Information
Status: No errors detected
Handle 0x0006, DMI type 127, 4 bytes
End Of Table
Regards,
Andreas
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