linux-kernel - Re: [PATCH v2 11/18] firmware: qcom

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <5dcf45bd.1c69fb81.297bb.9cb9@mx.google.com>
Date:   Fri, 15 Nov 2019 16:41:32 -0800
From:   Stephen Boyd <swboyd@...omium.org>
To:     Elliot Berman <eberman@...eaurora.org>, agross@...nel.org,
        bjorn.andersson@...aro.org, saiprakash.ranjan@...eaurora.org
Cc:     Elliot Berman <eberman@...eaurora.org>, tsoni@...eaurora.org,
        sidgup@...eaurora.org, psodagud@...eaurora.org,
        linux-arm-msm@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH v2 11/18] firmware: qcom_scm-32: Use SMC arch wrappers

Quoting Elliot Berman (2019-11-12 13:22:47)
> Use SMC arch wrappers instead of inline assembly.
> 
> Signed-off-by: Elliot Berman <eberman@...eaurora.org>
> ---

Nice. Can this come earlier in the series?

Reviewed-by: Stephen Boyd <swboyd@...omium.org>

> diff --git a/drivers/firmware/qcom_scm-32.c b/drivers/firmware/qcom_scm-32.c
> index e06d59b..c3aeccf 100644
> --- a/drivers/firmware/qcom_scm-32.c
> +++ b/drivers/firmware/qcom_scm-32.c
> @@ -10,6 +10,7 @@
>  #include <linux/errno.h>
>  #include <linux/err.h>
>  #include <linux/qcom_scm.h>
> +#include <linux/arm-smccc.h>
>  #include <linux/dma-mapping.h>
>  
>  #include "qcom_scm.h"
> @@ -124,25 +125,13 @@ static inline void *legacy_get_response_buffer(
>  static u32 __qcom_scm_call_do(u32 cmd_addr)
>  {
>         int context_id;
> -       register u32 r0 asm("r0") = 1;
> -       register u32 r1 asm("r1") = (u32)&context_id;
> -       register u32 r2 asm("r2") = cmd_addr;
> +       struct arm_smccc_res res;
>         do {
> -               asm volatile(
> -                       __asmeq("%0", "r0")
> -                       __asmeq("%1", "r0")
> -                       __asmeq("%2", "r1")
> -                       __asmeq("%3", "r2")
> -#ifdef REQUIRES_SEC
> -                       ".arch_extension sec\n"
> -#endif
> -                       "smc    #0      @ switch to secure world\n"
> -                       : "=r" (r0)
> -                       : "r" (r0), "r" (r1), "r" (r2)
> -                       : "r3", "r12");

I assume that the clobber list is not a problem? i.e. r12 is going to
get clobbered and that's not a problem.

> -       } while (r0 == QCOM_SCM_INTERRUPTED);
> -
> -       return r0;
> +               arm_smccc_smc(1, (unsigned long)&context_id, cmd_addr,
> +                             0, 0, 0, 0, 0, &res);