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Message-Id: <20191117114825.13541-4-masneyb@onstation.org>
Date: Sun, 17 Nov 2019 06:48:24 -0500
From: Brian Masney <masneyb@...tation.org>
To: robdclark@...il.com, sean@...rly.run, robh+dt@...nel.org
Cc: airlied@...ux.ie, daniel@...ll.ch, jcrouse@...eaurora.org,
dianders@...omium.org, linux-arm-msm@...r.kernel.org,
dri-devel@...ts.freedesktop.org, freedreno@...ts.freedesktop.org,
linux-kernel@...r.kernel.org, mark.rutland@....com,
devicetree@...r.kernel.org
Subject: [PATCH 3/4] drm/msm/a3xx: set interconnect bandwidth vote
Set the two interconnect paths for the GPU to maximum speed for now to
work towards getting the GPU working upstream. We can revisit a later
time to optimize this for battery life.
Signed-off-by: Brian Masney <masneyb@...tation.org>
---
drivers/gpu/drm/msm/adreno/a3xx_gpu.c | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/drivers/gpu/drm/msm/adreno/a3xx_gpu.c b/drivers/gpu/drm/msm/adreno/a3xx_gpu.c
index 07ddcc529573..f05adf9bc752 100644
--- a/drivers/gpu/drm/msm/adreno/a3xx_gpu.c
+++ b/drivers/gpu/drm/msm/adreno/a3xx_gpu.c
@@ -504,6 +504,14 @@ struct msm_gpu *a3xx_gpu_init(struct drm_device *dev)
DRM_DEV_ERROR(dev->dev, "No memory protection without IOMMU\n");
}
+ /*
+ * Set the ICC path to maximum speed for now by multiplying the fastest
+ * frequency by the bus width (8). We'll want to scale this later on to
+ * improve battery life.
+ */
+ icc_set_bw(gpu->gfx_mem_icc_path, 0, Bps_to_icc(gpu->fast_rate) * 8);
+ icc_set_bw(gpu->ocmem_icc_path, 0, Bps_to_icc(gpu->fast_rate) * 8);
+
return gpu;
fail:
--
2.21.0
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