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Message-Id: <1574077444-24554-1-git-send-email-kalyan_t@codeaurora.org>
Date: Mon, 18 Nov 2019 17:14:03 +0530
From: Kalyan Thota <kalyan_t@...eaurora.org>
To: dri-devel@...ts.freedesktop.org, linux-arm-msm@...r.kernel.org,
freedreno@...ts.freedesktop.org, devicetree@...r.kernel.org
Cc: Kalyan Thota <kalyan_t@...eaurora.org>,
linux-kernel@...r.kernel.org, robdclark@...il.com,
seanpaul@...omium.org, hoegsberg@...omium.org, dhar@...eaurora.org,
jsanka@...eaurora.org, chandanu@...eaurora.org,
travitej@...eaurora.org, nganji@...eaurora.org
Subject: [PATCH v1] msm:disp:dpu1: setup display datapath for SC7180 target
SC7180 follows a newer architecture where in some flush controls have been re-organized to simplify programming and provide for future expandability.
Specifically:
1) The TIMING_<j> bits that control flush of INTF_<j> have been replaced with a common INTF flush bit which flushes the programming in the MDP_CTL_<id>_INTF_ACTIVE register
2) Individual flush bits for MERGE_3D, DSC and CDWN have been added which flush the programming in the MDP_CTL_<id>_MERGE_3D_ACTIVE, ... etc respectively
3) PERIPH flush bit has been added to flush DSP packets for DisplayPort
The complete datapath is described using the MDP_CTL_<id>_TOP and newly added ACTIVE registers to handle other sub blocks
such as interface (INTF) resources, PingPong buffer / Layer Mixer, Display Stream Compression (DSC) resources, writeback (WB) and 3D Merge
selections that are part of the datapath.
Kalyan Thota (1):
msm:disp:dpu1: setup display datapath for SC7180 target
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 4 +-
.../gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c | 21 +++++-
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c | 1 +
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c | 84 +++++++++++++++++++++-
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.h | 24 +++++++
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.c | 28 ++++++++
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.h | 6 ++
7 files changed, 161 insertions(+), 7 deletions(-)
--
1.9.1
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