linux-kernel - [PATCH v1 2/2] platform/x86: intel_pmc_core: Add Comet Lake (CML) platform support to intel_pmc

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Message-Id: <8638b6f60474684b075fd4c88ec94e55bc2e1d8b.1574102528.git.gayatri.kammela@intel.com>
Date:   Mon, 18 Nov 2019 11:05:41 -0800
From:   Gayatri Kammela <gayatri.kammela@...el.com>
To:     platform-driver-x86@...r.kernel.org
Cc:     vishwanath.somayaji@...el.com, dvhart@...radead.org,
        linux-kernel@...r.kernel.org, charles.d.prestopine@...el.com,
        Gayatri Kammela <gayatri.kammela@...el.com>,
        Mario Limonciello <mario.limonciello@...l.com>,
        Peter Zijlstra <peterz@...radead.org>,
        Srinivas Pandruvada <srinivas.pandruvada@...el.com>,
        Andy Shevchenko <andriy.shevchenko@...ux.intel.com>,
        Kan Liang <kan.liang@...el.com>,
        "David E . Box" <david.e.box@...el.com>,
        Rajneesh Bhardwaj <rajneesh.bhardwaj@...el.com>,
        Tony Luck <tony.luck@...el.com>
Subject: [PATCH v1 2/2] platform/x86: intel_pmc_core: Add Comet Lake (CML) platform support to  intel_pmc_core driver

Add Comet Lake to the list of the platforms that intel_pmc_core driver
supports for pmc_core device.

Just like Ice Lake, Comet Lake can also reuse all the Cannon Lake PCH
IPs. No additional effort is needed to enable but to simply reuse them.

Cc: Mario Limonciello <mario.limonciello@...l.com>
Cc: Peter Zijlstra <peterz@...radead.org>
Cc: Srinivas Pandruvada <srinivas.pandruvada@...el.com>
Cc: Andy Shevchenko <andriy.shevchenko@...ux.intel.com>
Cc: Kan Liang <kan.liang@...el.com>
Cc: David E. Box <david.e.box@...el.com>
Cc: Rajneesh Bhardwaj <rajneesh.bhardwaj@...el.com>
Cc: Tony Luck <tony.luck@...el.com>
Signed-off-by: Gayatri Kammela <gayatri.kammela@...el.com>
---
 drivers/platform/x86/intel_pmc_core.c | 7 +++++--
 1 file changed, 5 insertions(+), 2 deletions(-)

diff --git a/drivers/platform/x86/intel_pmc_core.c b/drivers/platform/x86/intel_pmc_core.c
index 6b6edc30f835..571b4754477c 100644
--- a/drivers/platform/x86/intel_pmc_core.c
+++ b/drivers/platform/x86/intel_pmc_core.c
@@ -160,6 +160,7 @@ static const struct pmc_reg_map spt_reg_map = {
 
 /* Cannon Lake: PGD PFET Enable Ack Status Register(s) bitmap */
 static const struct pmc_bit_map cnp_pfear_map[] = {
+	/* Reserved for Cannon Lake but valid for Comet Lake */
 	{"PMC",                 BIT(0)},
 	{"OPI-DMI",             BIT(1)},
 	{"SPI/eSPI",            BIT(2)},
@@ -185,7 +186,7 @@ static const struct pmc_bit_map cnp_pfear_map[] = {
 	{"SDX",                 BIT(4)},
 	{"SPE",                 BIT(5)},
 	{"Fuse",                BIT(6)},
-	/* Reserved for Cannon Lake but valid for Ice Lake */
+	/* Reserved for Cannon Lake but valid for Ice Lake and Comet Lake */
 	{"SBR8",		BIT(7)},
 
 	{"CSME_FSC",            BIT(0)},
@@ -229,7 +230,7 @@ static const struct pmc_bit_map cnp_pfear_map[] = {
 	{"HDA_PGD4",            BIT(2)},
 	{"HDA_PGD5",            BIT(3)},
 	{"HDA_PGD6",            BIT(4)},
-	/* Reserved for Cannon Lake but valid for Ice Lake */
+	/* Reserved for Cannon Lake but valid for Ice Lake and Comet Lake */
 	{"PSF6",		BIT(5)},
 	{"PSF7",		BIT(6)},
 	{"PSF8",		BIT(7)},
@@ -813,6 +814,8 @@ static const struct x86_cpu_id intel_pmc_core_ids[] = {
 	INTEL_CPU_FAM6(CANNONLAKE_L, cnp_reg_map),
 	INTEL_CPU_FAM6(ICELAKE_L, icl_reg_map),
 	INTEL_CPU_FAM6(ICELAKE_NNPI, icl_reg_map),
+	INTEL_CPU_FAM6(COMETLAKE, cnp_reg_map),
+	INTEL_CPU_FAM6(COMETLAKE_L, cnp_reg_map),
 	{}
 };
 
-- 
2.17.1