[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <alpine.DEB.2.21.9999.1911200002310.490@viisi.sifive.com>
Date: Wed, 20 Nov 2019 00:04:13 -0800 (PST)
From: Paul Walmsley <paul.walmsley@...ive.com>
To: Anup Patel <Anup.Patel@....com>
cc: Palmer Dabbelt <palmer@...ive.com>,
Paolo Bonzini <pbonzini@...hat.com>,
Radim K <rkrcmar@...hat.com>,
Daniel Lezcano <daniel.lezcano@...aro.org>,
Thomas Gleixner <tglx@...utronix.de>,
Alexander Graf <graf@...zon.com>,
Atish Patra <Atish.Patra@....com>,
Alistair Francis <Alistair.Francis@....com>,
Damien Le Moal <Damien.LeMoal@....com>,
Christoph Hellwig <hch@...radead.org>,
Anup Patel <anup@...infault.org>,
"kvm@...r.kernel.org" <kvm@...r.kernel.org>,
"linux-riscv@...ts.infradead.org" <linux-riscv@...ts.infradead.org>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH v9 03/22] RISC-V: Add initial skeletal KVM support
Hi,
On Wed, 16 Oct 2019, Anup Patel wrote:
> This patch adds initial skeletal KVM RISC-V support which has:
> 1. A simple implementation of arch specific VM functions
> except kvm_vm_ioctl_get_dirty_log() which will implemeted
> in-future as part of stage2 page loging.
> 2. Stubs of required arch specific VCPU functions except
> kvm_arch_vcpu_ioctl_run() which is semi-complete and
> extended by subsequent patches.
> 3. Stubs for required arch specific stage2 MMU functions.
>
> Signed-off-by: Anup Patel <anup.patel@....com>
> Acked-by: Paolo Bonzini <pbonzini@...hat.com>
> Reviewed-by: Paolo Bonzini <pbonzini@...hat.com>
> Reviewed-by: Alexander Graf <graf@...zon.com>
Olof's autobuilder found an issue with this patch (below)
> diff --git a/arch/riscv/include/asm/kvm_host.h b/arch/riscv/include/asm/kvm_host.h
> new file mode 100644
> index 000000000000..9459709656be
> --- /dev/null
> +++ b/arch/riscv/include/asm/kvm_host.h
> @@ -0,0 +1,81 @@
> +/* SPDX-License-Identifier: GPL-2.0 */
This should be
/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
to match the license used in the kvm.h files in other architectures.
- Paul
Powered by blists - more mailing lists