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Message-ID: <1574242283.27063.5.camel@mbjsdccf07>
Date: Wed, 20 Nov 2019 17:31:23 +0800
From: luhua xu <luhua.xu@...iatek.com>
To: Mark Brown <broonie@...nel.org>
CC: Matthias Brugger <matthias.bgg@...il.com>,
Allison Randal <allison@...utok.net>,
Enrico Weigelt <info@...ux.net>,
Kate Stewart <kstewart@...uxfoundation.org>,
Leilk Liu <leilk.liu@...iatek.com>,
"Thomas Gleixner" <tglx@...utronix.de>,
<linux-spi@...r.kernel.org>,
<linux-arm-kernel@...ts.infradead.org>,
<linux-mediatek@...ts.infradead.org>,
<linux-kernel@...r.kernel.org>, <wsd_upstream@...iatek.com>
Subject: Re: [PATCH 2/2] spi: mediatek: add cs timing configuration support
On Tue, 2019-11-19 at 18:19 +0000, Mark Brown wrote:
> On Mon, Nov 18, 2019 at 12:57:17PM +0800, Luhua Xu wrote:
> > Add configure SPI CS setup/hold/idle delays in terms
> > of clk count support, and use one period of current
> > spi speed as default if setup/hold/idle not indicated.
>
> We have added a generic way to specify delays like this via the
> set_cs_timing() operation and related fields in the spi_device struct
> which operate in terms of spi_delay - Alexandru Ardelean added them
> recently. This supports both times and clock cycles as units so should
> fit with what your hardware can do, the interface is new though so there
> may be soem rough edges to worry about.
I find the patch today. It's really a better idear.
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