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Message-Id: <1574258149-15602-1-git-send-email-suravee.suthikulpanit@amd.com>
Date: Wed, 20 Nov 2019 07:55:47 -0600
From: Suravee Suthikulpanit <suravee.suthikulpanit@....com>
To: linux-kernel@...r.kernel.org, iommu@...ts.linux-foundation.org
Cc: joro@...tes.org,
Suravee Suthikulpanit <suravee.suthikulpanit@....com>
Subject: [PATCH 0/2] iommu/amd: Fixes for x2APIC support
Adding feature support check for MMIO access to MSI capability
block registers when enabling x2APIC (XT) mode. Also fix up logic
for checking XT feature support for IVHD type 10h.
Suravee Suthikulpanit (2):
iommu/amd: Check feature support bit before accessing MSI capability
registers
iommu/amd: Only support x2APIC with IVHD type 11h/40h
drivers/iommu/amd_iommu_init.c | 19 ++++++++++++-------
drivers/iommu/amd_iommu_types.h | 2 +-
2 files changed, 13 insertions(+), 8 deletions(-)
--
1.8.3.1
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