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Message-ID: <20191120162143.GB32572@linux.intel.com>
Date: Wed, 20 Nov 2019 08:21:43 -0800
From: Sean Christopherson <sean.j.christopherson@...el.com>
To: Borislav Petkov <bp@...en8.de>
Cc: Ingo Molnar <mingo@...nel.org>, Jann Horn <jannh@...gle.com>,
Thomas Gleixner <tglx@...utronix.de>,
Ingo Molnar <mingo@...hat.com>,
"H. Peter Anvin" <hpa@...or.com>,
the arch/x86 maintainers <x86@...nel.org>,
Andrey Ryabinin <aryabinin@...tuozzo.com>,
Alexander Potapenko <glider@...gle.com>,
Dmitry Vyukov <dvyukov@...gle.com>,
kasan-dev <kasan-dev@...glegroups.com>,
kernel list <linux-kernel@...r.kernel.org>,
Andrey Konovalov <andreyknvl@...gle.com>,
Andy Lutomirski <luto@...nel.org>,
Andi Kleen <ak@...ux.intel.com>
Subject: Re: [PATCH v3 2/4] x86/traps: Print non-canonical address on #GP
On Wed, Nov 20, 2019 at 02:39:13PM +0100, Borislav Petkov wrote:
> On Wed, Nov 20, 2019 at 02:28:30PM +0100, Ingo Molnar wrote:
> > I'd rather we not trust the decoder and the execution environment so much
> > that it never produces a 0 linear address in a #GP:
>
> I was just scratching my head whether I could trigger a #GP with address
> of 0. But yeah, I agree, let's be really cautious here. I wouldn't want
> to debug a #GP with a wrong address reported.
It's definitely possible, there are a handful of non-SIMD instructions that
generate #GP(0) it CPL=0 in 64-bit mode *and* have a memory operand. Some
of them might even be legitimately encountered in the wild.
- CMPXCHG16B if it's not supported by the CPU.
- VMXON if CR4 is misconfigured or VMX isn't enabled in FEATURE_CONTROL.
- MONITOR if ECX has an invalid hint (although MONITOR hardcodes the
address in DS:RAX and so doesn't have a ModR/M byte).
Undoudbtedly there are other instructions with similar sources of #GP.
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