linux-kernel - Re: [PATCH v4 0/3] Append new variables to vmcoreinfo (TCR_EL1.T1SZ for arm64 and MAX_PHYSMEM

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Date:   Thu, 21 Nov 2019 09:35:29 +0530
From:   Bhupesh Sharma <bhsharma@...hat.com>
To:     Dave Young <dyoung@...hat.com>
Cc:     Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
        Mark Rutland <mark.rutland@....com>,
        Linux Doc Mailing List <linux-doc@...r.kernel.org>,
        Benjamin Herrenschmidt <benh@...nel.crashing.org>,
        Paul Mackerras <paulus@...ba.org>,
        Will Deacon <will@...nel.org>, Ingo Molnar <mingo@...nel.org>,
        Jonathan Corbet <corbet@....net>,
        Michael Ellerman <mpe@...erman.id.au>, x86@...nel.org,
        Catalin Marinas <catalin.marinas@....com>,
        Boris Petkov <bp@...en8.de>,
        Thomas Gleixner <tglx@...utronix.de>,
        Bhupesh SHARMA <bhupesh.linux@...il.com>,
        linux-arm-kernel <linux-arm-kernel@...ts.infradead.org>,
        Kazuhito Hagio <k-hagio@...jp.nec.com>,
        Ard Biesheuvel <ard.biesheuvel@...aro.org>,
        Steve Capper <steve.capper@....com>,
        kexec mailing list <kexec@...ts.infradead.org>,
        James Morse <james.morse@....com>,
        Dave Anderson <anderson@...hat.com>,
        linuxppc-dev@...ts.ozlabs.org
Subject: Re: [PATCH v4 0/3] Append new variables to vmcoreinfo (TCR_EL1.T1SZ
 for arm64 and MAX_PHYSMEM_BITS for all archs)

Hi Dave,

On Thu, Nov 21, 2019 at 8:51 AM Dave Young <dyoung@...hat.com> wrote:
>
> On 11/11/19 at 01:31pm, Bhupesh Sharma wrote:
> > Changes since v3:
> > ----------------
> > - v3 can be seen here:
> >   http://lists.infradead.org/pipermail/kexec/2019-March/022590.html
> > - Addressed comments from James and exported TCR_EL1.T1SZ in vmcoreinfo
> >   instead of PTRS_PER_PGD.
> > - Added a new patch (via [PATCH 3/3]), which fixes a simple typo in
> >   'Documentation/arm64/memory.rst'
> >
> > Changes since v2:
> > ----------------
> > - v2 can be seen here:
> >   http://lists.infradead.org/pipermail/kexec/2019-March/022531.html
> > - Protected 'MAX_PHYSMEM_BITS' vmcoreinfo variable under CONFIG_SPARSEMEM
> >   ifdef sections, as suggested by Kazu.
> > - Updated vmcoreinfo documentation to add description about
> >   'MAX_PHYSMEM_BITS' variable (via [PATCH 3/3]).
> >
> > Changes since v1:
> > ----------------
> > - v1 was sent out as a single patch which can be seen here:
> >   http://lists.infradead.org/pipermail/kexec/2019-February/022411.html
> >
> > - v2 breaks the single patch into two independent patches:
> >   [PATCH 1/2] appends 'PTRS_PER_PGD' to vmcoreinfo for arm64 arch, whereas
> >   [PATCH 2/2] appends 'MAX_PHYSMEM_BITS' to vmcoreinfo in core kernel code (all archs)
> >
> > This patchset primarily fixes the regression reported in user-space
> > utilities like 'makedumpfile' and 'crash-utility' on arm64 architecture
> > with the availability of 52-bit address space feature in underlying
> > kernel. These regressions have been reported both on CPUs which don't
> > support ARMv8.2 extensions (i.e. LVA, LPA) and are running newer kernels
> > and also on prototype platforms (like ARMv8 FVP simulator model) which
> > support ARMv8.2 extensions and are running newer kernels.
> >
> > The reason for these regressions is that right now user-space tools
> > have no direct access to these values (since these are not exported
> > from the kernel) and hence need to rely on a best-guess method of
> > determining value of 'vabits_actual' and 'MAX_PHYSMEM_BITS' supported
> > by underlying kernel.
> >
> > Exporting these values via vmcoreinfo will help user-land in such cases.
> > In addition, as per suggestion from makedumpfile maintainer (Kazu),
> > it makes more sense to append 'MAX_PHYSMEM_BITS' to
> > vmcoreinfo in the core code itself rather than in arm64 arch-specific
> > code, so that the user-space code for other archs can also benefit from
> > this addition to the vmcoreinfo and use it as a standard way of
> > determining 'SECTIONS_SHIFT' value in user-land.
> >
> > Cc: Boris Petkov <bp@...en8.de>
> > Cc: Ingo Molnar <mingo@...nel.org>
> > Cc: Thomas Gleixner <tglx@...utronix.de>
> > Cc: Jonathan Corbet <corbet@....net>
> > Cc: James Morse <james.morse@....com>
> > Cc: Mark Rutland <mark.rutland@....com>
> > Cc: Will Deacon <will@...nel.org>
> > Cc: Steve Capper <steve.capper@....com>
> > Cc: Catalin Marinas <catalin.marinas@....com>
> > Cc: Ard Biesheuvel <ard.biesheuvel@...aro.org>
> > Cc: Michael Ellerman <mpe@...erman.id.au>
> > Cc: Paul Mackerras <paulus@...ba.org>
> > Cc: Benjamin Herrenschmidt <benh@...nel.crashing.org>
> > Cc: Dave Anderson <anderson@...hat.com>
> > Cc: Kazuhito Hagio <k-hagio@...jp.nec.com>
> > Cc: x86@...nel.org
> > Cc: linuxppc-dev@...ts.ozlabs.org
> > Cc: linux-arm-kernel@...ts.infradead.org
> > Cc: linux-kernel@...r.kernel.org
> > Cc: linux-doc@...r.kernel.org
> > Cc: kexec@...ts.infradead.org
> >
> > Bhupesh Sharma (3):
> >   crash_core, vmcoreinfo: Append 'MAX_PHYSMEM_BITS' to vmcoreinfo
> >   arm64/crash_core: Export TCR_EL1.T1SZ in vmcoreinfo
>
> Soft reminder:  the new introduced vmcoreinfo needs documentation
>
> Please check Documentation/admin-guide/kdump/vmcoreinfo.rst

Sure, will send a v5 to address the same.

Thanks,
Bhupesh