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Message-ID: <9d3a1e61-4c75-fd5c-7142-111f08117530@st.com>
Date: Thu, 21 Nov 2019 10:05:52 +0100
From: Arnaud POULIQUEN <arnaud.pouliquen@...com>
To: Rob Herring <robh@...nel.org>
CC: Mark Rutland <mark.rutland@....com>,
Alexandre Torgue <alexandre.torgue@...com>,
Jassi Brar <jassisinghbrar@...il.com>,
<devicetree@...r.kernel.org>,
<linux-stm32@...md-mailman.stormreply.com>,
"moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE"
<linux-arm-kernel@...ts.infradead.org>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
Fabien Dessenne <fabien.dessenne@...com>
Subject: Re: [PATCH v2] dt-bindings: mailbox: convert stm32-ipcc to
json-schema
On 11/20/19 9:26 PM, Rob Herring wrote:
> On Mon, Nov 18, 2019 at 4:15 AM Arnaud Pouliquen
> <arnaud.pouliquen@...com> wrote:
>>
>> Convert the STM32 IPCC bindings to DT schema format using
>> json-schema
>>
>> Signed-off-by: Arnaud Pouliquen <arnaud.pouliquen@...com>
>> ---
>> .../bindings/mailbox/st,stm32-ipcc.yaml | 91 +++++++++++++++++++
>> .../bindings/mailbox/stm32-ipcc.txt | 47 ----------
>> 2 files changed, 91 insertions(+), 47 deletions(-)
>> create mode 100644 Documentation/devicetree/bindings/mailbox/st,stm32-ipcc.yaml
>> delete mode 100644 Documentation/devicetree/bindings/mailbox/stm32-ipcc.txt
>
> Thanks for helping me find 2 meta-schema errors. :) Please update
> dt-schema and re-run 'make dt_binding_check'.
>
it a privilege to help you to improve the scripts ;-)
Thanks for the reviews, based on it i will also update the following patch
dt-bindings: remoteproc: convert stm32-rproc to json-schema
Regards
Arnaud
>> diff --git a/Documentation/devicetree/bindings/mailbox/st,stm32-ipcc.yaml b/Documentation/devicetree/bindings/mailbox/st,stm32-ipcc.yaml
>> new file mode 100644
>> index 000000000000..90157d4deac1
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/mailbox/st,stm32-ipcc.yaml
>> @@ -0,0 +1,91 @@
>> +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
>> +%YAML 1.2
>> +---
>> +$id: "http://devicetree.org/schemas/mailbox/st,stm32-ipcc.yaml#"
>> +$schema: "http://devicetree.org/meta-schemas/core.yaml#"
>> +
>> +title: STMicroelectronics STM32 IPC controller bindings
>> +
>> +description:
>> + The IPCC block provides a non blocking signaling mechanism to post and
>> + retrieve messages in an atomic way between two processors.
>> + It provides the signaling for N bidirectionnal channels. The number of
>> + channels (N) can be read from a dedicated register.
>> +
>> +maintainers:
>> + - Fabien Dessenne <fabien.dessenne@...com>
>> + - Arnaud Pouliquen <arnaud.pouliquen@...com>
>> +
>> +properties:
>> + compatible:
>> + const: st,stm32mp1-ipcc
>> +
>> + reg:
>> + maxItems: 1
>> +
>> + clocks:
>> + maxItems: 1
>> +
>> + interrupts:
>> + items:
>> + - description: rx channel occupied
>> + - description: tx channel free
>> + - description: wakeup source
>> + minItems: 2
>> + maxItems: 3
>> +
>> + interrupt-names:
>> + items:
>> + enums: [ rx, tx, wakeup ]
>
> 'enums' is not a valid keyword. 'enum' is valid, but his should be in
> a defined order (so a list of items).
>
>> + minItems: 2
>> + maxItems: 3
>> +
>> + wakeup-source:
>> + $ref: /schemas/types.yaml#/definitions/flag
>> + description:
>> + Enables wake up of host system on wakeup IRQ assertion.
>
> Just 'true' is enough here. Assume we have a common definition.
>
>> +
>> + "#mbox-cells":
>> + const: 1
>> +
>> + st,proc-id:
>> + description: Processor id using the mailbox (0 or 1)
>> + allOf:
>> + - minimum: 0
>> + - maximum: 1
>
> 'enum: [ 0, 1 ]' is more concise.
>
> Also, needs a $ref to the type.
>
>> + - default: 0
>> +
>> +required:
>> + - compatible
>> + - reg
>> + - st,proc-id
>> + - clocks
>> + - interrupt-names
>> + - "#mbox-cells"
>> +
>> +oneOf:
>> + - required:
>> + - interrupts
>> + - required:
>> + - interrupts-extended
>
> The tooling takes care of this for you. Just list 'interrupts' as required.
>
>> +
>> +additionalProperties: false
>> +
>> +examples:
>> + - |
>> + #include <dt-bindings/interrupt-controller/arm-gic.h>
>> + #include <dt-bindings/clock/stm32mp1-clks.h>
>> + ipcc: mailbox@...01000 {
>> + compatible = "st,stm32mp1-ipcc";
>> + #mbox-cells = <1>;
>> + reg = <0x4c001000 0x400>;
>> + st,proc-id = <0>;
>> + interrupts-extended = <&intc GIC_SPI 100 IRQ_TYPE_NONE>,
>> + <&intc GIC_SPI 101 IRQ_TYPE_NONE>,
>> + <&aiec 62 1>;
>> + interrupt-names = "rx", "tx", "wakeup";
>> + clocks = <&rcc_clk IPCC>;
>> + wakeup-source;
>> + };
>> +
>> +...
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