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Message-Id: <20191123203759.20708-6-afaerber@suse.de>
Date: Sat, 23 Nov 2019 21:37:56 +0100
From: Andreas Färber <afaerber@...e.de>
To: linux-realtek-soc@...ts.infradead.org
Cc: linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
Andreas Färber <afaerber@...e.de>,
Rob Herring <robh+dt@...nel.org>,
Mark Rutland <mark.rutland@....com>, devicetree@...r.kernel.org
Subject: [PATCH v4 5/8] ARM: dts: rtd1195: Introduce r-bus
Model Realtek's register bus in DT.
Signed-off-by: Andreas Färber <afaerber@...e.de>
---
v3 -> v4: Unchanged
v3: from RTD1395 v1
* Fixed r-bus size from 0x100000 to 0x70000 in reg and ranges (James)
* Renamed bus node from r-bus to bus (Rob)
arch/arm/boot/dts/rtd1195.dtsi | 52 ++++++++++++++++++++++++------------------
1 file changed, 30 insertions(+), 22 deletions(-)
diff --git a/arch/arm/boot/dts/rtd1195.dtsi b/arch/arm/boot/dts/rtd1195.dtsi
index 0d7c2be750f6..a8f7b9caacba 100644
--- a/arch/arm/boot/dts/rtd1195.dtsi
+++ b/arch/arm/boot/dts/rtd1195.dtsi
@@ -93,28 +93,36 @@
<0x18100000 0x18100000 0x01000000>,
<0x80000000 0x80000000 0x80000000>;
- wdt: watchdog@...07680 {
- compatible = "realtek,rtd1295-watchdog";
- reg = <0x18007680 0x100>;
- clocks = <&osc27M>;
- };
-
- uart0: serial@...07800 {
- compatible = "snps,dw-apb-uart";
- reg = <0x18007800 0x400>;
- reg-shift = <2>;
- reg-io-width = <4>;
- clock-frequency = <27000000>;
- status = "disabled";
- };
-
- uart1: serial@...1b200 {
- compatible = "snps,dw-apb-uart";
- reg = <0x1801b200 0x100>;
- reg-shift = <2>;
- reg-io-width = <4>;
- clock-frequency = <27000000>;
- status = "disabled";
+ rbus: bus@...00000 {
+ compatible = "simple-bus";
+ reg = <0x18000000 0x70000>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x0 0x18000000 0x70000>;
+
+ wdt: watchdog@...0 {
+ compatible = "realtek,rtd1295-watchdog";
+ reg = <0x7680 0x100>;
+ clocks = <&osc27M>;
+ };
+
+ uart0: serial@...0 {
+ compatible = "snps,dw-apb-uart";
+ reg = <0x7800 0x400>;
+ reg-shift = <2>;
+ reg-io-width = <4>;
+ clock-frequency = <27000000>;
+ status = "disabled";
+ };
+
+ uart1: serial@...00 {
+ compatible = "snps,dw-apb-uart";
+ reg = <0x1b200 0x100>;
+ reg-shift = <2>;
+ reg-io-width = <4>;
+ clock-frequency = <27000000>;
+ status = "disabled";
+ };
};
gic: interrupt-controller@...11000 {
--
2.16.4
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