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Message-ID: <CH2PR13MB3368B3660A55C509272CE1238C4A0@CH2PR13MB3368.namprd13.prod.outlook.com>
Date:   Mon, 25 Nov 2019 04:54:40 +0000
From:   Yash Shah <yash.shah@...ive.com>
To:     Linus Walleij <linus.walleij@...aro.org>,
        Bartosz Golaszewski <bgolaszewski@...libre.com>
CC:     "robh+dt@...nel.org" <robh+dt@...nel.org>,
        "mark.rutland@....com" <mark.rutland@....com>,
        "palmer@...belt.com" <palmer@...belt.com>,
        "Paul Walmsley ( Sifive)" <paul.walmsley@...ive.com>,
        "aou@...s.berkeley.edu" <aou@...s.berkeley.edu>,
        "tglx@...utronix.de" <tglx@...utronix.de>,
        "jason@...edaemon.net" <jason@...edaemon.net>,
        "maz@...nel.org" <maz@...nel.org>,
        "bmeng.cn@...il.com" <bmeng.cn@...il.com>,
        "atish.patra@....com" <atish.patra@....com>,
        Sagar Kadam <sagar.kadam@...ive.com>,
        "linux-gpio@...r.kernel.org" <linux-gpio@...r.kernel.org>,
        "devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
        "linux-riscv@...ts.infradead.org" <linux-riscv@...ts.infradead.org>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        Sachin Ghadi <sachin.ghadi@...ive.com>
Subject: RE: [PATCH 3/4] gpio: sifive: Add GPIO driver for SiFive SoCs

> -----Original Message-----
> From: Linus Walleij <linus.walleij@...aro.org>
> Sent: 22 November 2019 17:58
> To: Bartosz Golaszewski <bgolaszewski@...libre.com>
> Cc: Yash Shah <yash.shah@...ive.com>; robh+dt@...nel.org;
> mark.rutland@....com; palmer@...belt.com; Paul Walmsley ( Sifive)
> <paul.walmsley@...ive.com>; aou@...s.berkeley.edu; tglx@...utronix.de;
> jason@...edaemon.net; maz@...nel.org; bmeng.cn@...il.com;
> atish.patra@....com; Sagar Kadam <sagar.kadam@...ive.com>; linux-
> gpio@...r.kernel.org; devicetree@...r.kernel.org; linux-
> riscv@...ts.infradead.org; linux-kernel@...r.kernel.org; Sachin Ghadi
> <sachin.ghadi@...ive.com>
> Subject: Re: [PATCH 3/4] gpio: sifive: Add GPIO driver for SiFive SoCs
> 
> On Tue, Nov 19, 2019 at 5:42 PM Bartosz Golaszewski
> <bgolaszewski@...libre.com> wrote:
> > wt., 19 lis 2019 o 16:03 Linus Walleij <linus.walleij@...aro.org> napisał(a):
> > > On Mon, Nov 18, 2019 at 11:15 AM Bartosz Golaszewski
> > > <bgolaszewski@...libre.com> wrote:
> 
> > > > pon., 18 lis 2019 o 11:03 Yash Shah <yash.shah@...ive.com> napisał(a):
> > > Is it really so? The bgpio_lock does protect the registers used by
> > > regmap-mmio but unless the interrupt code is also using the same
> > > registers it is fine to have a different lock for those.
> > >
> > > Is the interrupt code really poking into the very same registers as
> > > passed to bgpio_init()?
> > >
> > > Of course it could be seen as a bit dirty to poke around in the same
> > > memory space with regmap and the bgpio_* accessors but in practice
> > > it's no problem if they never touch the same things.
> > >
> > > Yours,
> > > Linus Walleij
> >
> > I'm wondering if it won't cause any inconsistencies when for example
> > interrupts are being triggered on input lines while we're also reading
> > their values? Seems to me it's just more clear to use a single lock
> > for a register range. Most drivers using gpio-mmio do just that in
> > their irq-related routines.
> 
> OK good point. Just one lock for the whole thing is likely more maintainable
> even if it works with two different locks.
> 
> > Anyway: even without using bgpio_lock this code is inconsistent: if
> > we're using regmap for interrupt registers, we should either decide to
> > rely on locking provided by regmap or disable it and use a locally
> > defined lock.
> 
> OK makes sense, let's say we use the bgpio_lock everywhere for this.
> 
> Yash: are you OK with this? (Haven't read the new patch set yet, maybe it is
> already fixed...)

Yes, I am ok with this. I will be sending v3 soon with this change.

- Yash

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