linux-kernel - [PATCH] NTB: Fix access to link status and control register

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [day] [month] [year] [list]

Date:   Tue, 26 Nov 2019 09:01:16 -0600
From:   Sanjay R Mehta <Sanju.Mehta@....com>
To:     Shyam-sundar.S-k@....com, linjiasen@...on.cn, arindam.nath@....com,
        jdmason@...zu.us, dave.jiang@...el.com, allenbh@...il.com
Cc:     linux-ntb@...glegroups.com, linux-kernel@...r.kernel.org,
        Sanjay R Mehta <sanju.mehta@....com>
Subject: [PATCH] NTB: Fix access to link status and control register

From: Sanjay R Mehta <sanju.mehta@....com>

The design of AMD NTB implementation is such that
the NTB secondary endpoint is behind a combination
of Upstream Switch (SWUS) and a Downstream Switch
(SWDS). The link training happens on the SWUS and
not on the secondary endpoint. So to correctly
return the link status on the NTB secondary, we
need to read the link status of the SWUS.

Signed-off-by: Jiasen Lin <linjiasen@...on.cn>
Signed-off-by: Arindam Nath <arindam.nath@....com>
Signed-off-by: Sanjay R Mehta <sanju.mehta@....com>
---
 drivers/ntb/hw/amd/ntb_hw_amd.c | 45 +++++++++++++++++++++++++++++++++++++----
 1 file changed, 41 insertions(+), 4 deletions(-)

diff --git a/drivers/ntb/hw/amd/ntb_hw_amd.c b/drivers/ntb/hw/amd/ntb_hw_amd.c
index ae91105..758f748 100644
--- a/drivers/ntb/hw/amd/ntb_hw_amd.c
+++ b/drivers/ntb/hw/amd/ntb_hw_amd.c
@@ -842,6 +842,9 @@ static inline void ndev_init_struct(struct amd_ntb_dev *ndev,
 static int amd_poll_link(struct amd_ntb_dev *ndev)
 {
 	void __iomem *mmio = ndev->peer_mmio;
+	struct pci_dev *pdev = NULL;
+	struct pci_dev *pci_swds = NULL;
+	struct pci_dev *pci_swus = NULL;
 	u32 reg, stat;
 	int rc;
 
@@ -855,10 +858,44 @@ static int amd_poll_link(struct amd_ntb_dev *ndev)
 
 	ndev->cntl_sta = reg;
 
-	rc = pcie_capability_read_dword(ndev->ntb.pdev,
-				   PCI_EXP_LNKCTL, &stat);
-	if (rc)
-		return 0;
+	if (ndev->ntb.topo == NTB_TOPO_SEC) {
+		/*
+		 * Locate the pointer to Downstream Switch for
+		 * this device
+		 */
+		pci_swds = pci_upstream_bridge(ndev->ntb.pdev);
+		if (pci_swds) {
+			/*
+			 * Locate the pointer to Upstream Switch for
+			 * this device
+			 */
+			pci_swus = pci_upstream_bridge(pci_swds);
+			if (pci_swus) {
+				/*
+				 * Read the PCIe Link Control and
+				 * Status register
+				 */
+				rc = pcie_capability_read_dword(pci_swus,
+						PCI_EXP_LNKCTL, &stat);
+				if (rc)
+					return 0;
+			} else {
+				return 0;
+			}
+		} else {
+			return 0;
+		}
+	} else if (ndev->ntb.topo == NTB_TOPO_PRI) {
+		/*
+		 * For NTB primary, we simply read the Link Status and control
+		 * register of the NTB device itself.
+		 */
+		pdev = ndev->ntb.pdev;
+		rc = pcie_capability_read_dword(pdev, PCI_EXP_LNKCTL, &stat);
+		if (rc)
+			return 0;
+	}
+
 	ndev->lnk_sta = stat;
 
 	return 1;
-- 
2.7.4