linux-kernel - Re: [PATCH v2 2/2] clk: aspeed: Add RMII RCLK gates for both AST2500 MACs

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Message-Id: <20191126180320.1A2132071A@mail.kernel.org>
Date:   Tue, 26 Nov 2019 10:03:19 -0800
From:   Stephen Boyd <sboyd@...nel.org>
To:     Andrew Jeffery <andrew@...id.au>, linux-clk@...r.kernel.org
Cc:     mturquette@...libre.com, joel@....id.au, robh+dt@...nel.org,
        mark.rutland@....com, linux-arm-kernel@...ts.infradead.org,
        linux-aspeed@...ts.ozlabs.org, linux-kernel@...r.kernel.org,
        devicetree@...r.kernel.org
Subject: Re: [PATCH v2 2/2] clk: aspeed: Add RMII RCLK gates for both AST2500 MACs

Quoting Andrew Jeffery (2019-10-09 19:06:55)
> RCLK is a fixed 50MHz clock derived from HPLL that is described by a
> single gate for each MAC.
> 
> Signed-off-by: Andrew Jeffery <andrew@...id.au>
> ---

Applied to clk-next