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Message-Id: <baff592123801e2a0bb26daa0e2fc84cad6bb23c.1574798487.git.msuchanek@suse.de>
Date: Tue, 26 Nov 2019 21:13:20 +0100
From: Michal Suchanek <msuchanek@...e.de>
To: linuxppc-dev@...ts.ozlabs.org
Cc: Benjamin Herrenschmidt <benh@...nel.crashing.org>,
Paul Mackerras <paulus@...ba.org>,
Michael Ellerman <mpe@...erman.id.au>,
Oleg Nesterov <oleg@...hat.com>,
Alexander Viro <viro@...iv.linux.org.uk>,
Christian Brauner <christian@...uner.io>,
Nicholas Piggin <npiggin@...il.com>,
Allison Randal <allison@...utok.net>,
"Naveen N. Rao" <naveen.n.rao@...ux.vnet.ibm.com>,
Michal Suchanek <msuchanek@...e.de>,
Thomas Gleixner <tglx@...utronix.de>,
Breno Leitao <leitao@...ian.org>,
Christophe Leroy <christophe.leroy@....fr>,
Claudio Carvalho <cclaudio@...ux.ibm.com>,
Russell Currey <ruscur@...sell.cc>,
Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
Mahesh Salgaonkar <mahesh@...ux.vnet.ibm.com>,
Arnd Bergmann <arnd@...db.de>,
Geert Uytterhoeven <geert@...ux-m68k.org>,
Firoz Khan <firoz.khan@...aro.org>,
Dmitry Vyukov <dvyukov@...gle.com>,
Masahiro Yamada <yamada.masahiro@...ionext.com>,
Hari Bathini <hbathini@...ux.ibm.com>,
Andrew Donnellan <andrew.donnellan@....ibm.com>,
Nicolai Stange <nstange@...e.de>,
Valentin Schneider <valentin.schneider@....com>,
Diana Craciun <diana.craciun@....com>,
Daniel Axtens <dja@...ens.net>,
Michael Neuling <mikey@...ling.org>,
Gustavo Romero <gromero@...ux.ibm.com>,
Mathieu Malaterre <malat@...ian.org>,
"Steven Rostedt" <rostedt@...dmis.org>,
"Eric W. Biederman" <ebiederm@...ssion.com>,
Heiko Carstens <heiko.carstens@...ibm.com>,
David Howells <dhowells@...hat.com>,
Brajeswar Ghosh <brajeswar.linux@...il.com>,
Jagadeesh Pagadala <jagdsh.linux@...il.com>,
David Hildenbrand <david@...hat.com>,
Andrew Morton <akpm@...ux-foundation.org>,
Madhavan Srinivasan <maddy@...ux.vnet.ibm.com>,
linux-kernel@...r.kernel.org
Subject: [PATCH v2 06/35] powerpc/64s/exception: Remove old INT_ENTRY macro
From: Nicholas Piggin <npiggin@...il.com>
Signed-off-by: Nicholas Piggin <npiggin@...il.com>
---
arch/powerpc/kernel/exceptions-64s.S | 68 ++++++++++++----------------
1 file changed, 30 insertions(+), 38 deletions(-)
diff --git a/arch/powerpc/kernel/exceptions-64s.S b/arch/powerpc/kernel/exceptions-64s.S
index b5decc9a0cbf..ba2dcd91aaaf 100644
--- a/arch/powerpc/kernel/exceptions-64s.S
+++ b/arch/powerpc/kernel/exceptions-64s.S
@@ -482,13 +482,13 @@ END_FTR_SECTION_NESTED(CPU_FTR_HAS_PPR,CPU_FTR_HAS_PPR,948)
* - Fall through and continue executing in real, unrelocated mode.
* This is done if early=2.
*/
-.macro INT_HANDLER name, vec, ool=0, early=0, virt=0, hsrr=0, area=PACA_EXGEN, ri=1, dar=0, dsisr=0, bitmask=0, kvm=0
+.macro GEN_INT_ENTRY name, virt, ool=0
SET_SCRATCH0(r13) /* save r13 */
GET_PACA(r13)
- std r9,\area\()+EX_R9(r13) /* save r9 */
+ std r9,IAREA+EX_R9(r13) /* save r9 */
OPT_GET_SPR(r9, SPRN_PPR, CPU_FTR_HAS_PPR)
HMT_MEDIUM
- std r10,\area\()+EX_R10(r13) /* save r10 - r12 */
+ std r10,IAREA+EX_R10(r13) /* save r10 - r12 */
OPT_GET_SPR(r10, SPRN_CFAR, CPU_FTR_CFAR)
.if \ool
.if !\virt
@@ -502,47 +502,47 @@ END_FTR_SECTION_NESTED(CPU_FTR_HAS_PPR,CPU_FTR_HAS_PPR,948)
.endif
.endif
- OPT_SAVE_REG_TO_PACA(\area\()+EX_PPR, r9, CPU_FTR_HAS_PPR)
- OPT_SAVE_REG_TO_PACA(\area\()+EX_CFAR, r10, CPU_FTR_CFAR)
+ OPT_SAVE_REG_TO_PACA(IAREA+EX_PPR, r9, CPU_FTR_HAS_PPR)
+ OPT_SAVE_REG_TO_PACA(IAREA+EX_CFAR, r10, CPU_FTR_CFAR)
INTERRUPT_TO_KERNEL
- SAVE_CTR(r10, \area\())
+ SAVE_CTR(r10, IAREA)
mfcr r9
- .if \kvm
- KVMTEST \name \hsrr \vec
+ .if (!\virt && IKVM_REAL) || (\virt && IKVM_VIRT)
+ KVMTEST \name IHSRR IVEC
.endif
- .if \bitmask
+ .if IMASK
lbz r10,PACAIRQSOFTMASK(r13)
- andi. r10,r10,\bitmask
+ andi. r10,r10,IMASK
/* Associate vector numbers with bits in paca->irq_happened */
- .if \vec == 0x500 || \vec == 0xea0
+ .if IVEC == 0x500 || IVEC == 0xea0
li r10,PACA_IRQ_EE
- .elseif \vec == 0x900
+ .elseif IVEC == 0x900
li r10,PACA_IRQ_DEC
- .elseif \vec == 0xa00 || \vec == 0xe80
+ .elseif IVEC == 0xa00 || IVEC == 0xe80
li r10,PACA_IRQ_DBELL
- .elseif \vec == 0xe60
+ .elseif IVEC == 0xe60
li r10,PACA_IRQ_HMI
- .elseif \vec == 0xf00
+ .elseif IVEC == 0xf00
li r10,PACA_IRQ_PMI
.else
.abort "Bad maskable vector"
.endif
- .if \hsrr == EXC_HV_OR_STD
+ .if IHSRR == EXC_HV_OR_STD
BEGIN_FTR_SECTION
bne masked_Hinterrupt
FTR_SECTION_ELSE
bne masked_interrupt
ALT_FTR_SECTION_END_IFSET(CPU_FTR_HVMODE | CPU_FTR_ARCH_206)
- .elseif \hsrr
+ .elseif IHSRR
bne masked_Hinterrupt
.else
bne masked_interrupt
.endif
.endif
- std r11,\area\()+EX_R11(r13)
- std r12,\area\()+EX_R12(r13)
+ std r11,IAREA+EX_R11(r13)
+ std r12,IAREA+EX_R12(r13)
/*
* DAR/DSISR, SCRATCH0 must be read before setting MSR[RI],
@@ -550,47 +550,39 @@ END_FTR_SECTION_NESTED(CPU_FTR_HAS_PPR,CPU_FTR_HAS_PPR,948)
* not recoverable if they are live.
*/
GET_SCRATCH0(r10)
- std r10,\area\()+EX_R13(r13)
- .if \dar == 1
- .if \hsrr
+ std r10,IAREA+EX_R13(r13)
+ .if IDAR == 1
+ .if IHSRR
mfspr r10,SPRN_HDAR
.else
mfspr r10,SPRN_DAR
.endif
- std r10,\area\()+EX_DAR(r13)
+ std r10,IAREA+EX_DAR(r13)
.endif
- .if \dsisr == 1
- .if \hsrr
+ .if IDSISR == 1
+ .if IHSRR
mfspr r10,SPRN_HDSISR
.else
mfspr r10,SPRN_DSISR
.endif
- stw r10,\area\()+EX_DSISR(r13)
+ stw r10,IAREA+EX_DSISR(r13)
.endif
- .if \early == 2
+ .if IEARLY == 2
/* nothing more */
- .elseif \early
+ .elseif IEARLY
mfctr r10 /* save ctr, even for !RELOCATABLE */
BRANCH_TO_C000(r11, \name\()_common)
.elseif !\virt
- INT_SAVE_SRR_AND_JUMP \name\()_common, \hsrr, \ri
+ INT_SAVE_SRR_AND_JUMP \name\()_common, IHSRR, ISET_RI
.else
- INT_VIRT_SAVE_SRR_AND_JUMP \name\()_common, \hsrr
+ INT_VIRT_SAVE_SRR_AND_JUMP \name\()_common, IHSRR
.endif
.if \ool
.popsection
.endif
.endm
-.macro GEN_INT_ENTRY name, virt, ool=0
- .if ! \virt
- INT_HANDLER \name, IVEC, \ool, IEARLY, \virt, IHSRR, IAREA, ISET_RI, IDAR, IDSISR, IMASK, IKVM_REAL
- .else
- INT_HANDLER \name, IVEC, \ool, IEARLY, \virt, IHSRR, IAREA, ISET_RI, IDAR, IDSISR, IMASK, IKVM_VIRT
- .endif
-.endm
-
/*
* On entry r13 points to the paca, r9-r13 are saved in the paca,
* r9 contains the saved CR, r11 and r12 contain the saved SRR0 and
--
2.23.0
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