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Message-ID: <CAOMZO5AeMgUjH4pxC4B1OFqHZDgtXs3dAiFazKEa9_txd81v6A@mail.gmail.com>
Date: Wed, 27 Nov 2019 09:56:36 -0300
From: Fabio Estevam <festevam@...il.com>
To: Oliver Graute <oliver.graute@...il.com>
Cc: Marc Gonzalez <marc.w.gonzalez@...e.fr>,
Andrew Lunn <andrew@...n.ch>, Peng Fan <peng.fan@....com>,
Florian Fainelli <f.fainelli@...il.com>,
Anson Huang <anson.huang@....com>,
André Draszik <git@...red.net>,
LKML <linux-kernel@...r.kernel.org>,
Russell King <rmk+kernel@...linux.org.uk>,
dl-linux-imx <linux-imx@....com>,
Linux ARM <linux-arm-kernel@...ts.infradead.org>,
Heiner Kallweit <hkallweit1@...il.com>
Subject: Re: [PATCH] arm64: defconfig: Change CONFIG_AT803X_PHY from m to y
Hi Oliver,
On Wed, Nov 27, 2019 at 9:47 AM Oliver Graute <oliver.graute@...il.com> wrote:
> I'am using this DTS which I'am currently working on:
>
> https://lists.infradead.org/pipermail/linux-arm-kernel/2019-October/689501.html
> >
> > I bet one dollar that 6d4cd041f0af triggered a latent bug in the DTS.
>
> So what should I fix in my device tree?
Some suggestions you could try:
- Try to use phy-mode = "rgmii-id"; instead,
- The PHY address 0 does not match the reg value of 4, so you need to
double check the PHY address and make the @ and reg values to match.
- If you have a GPIO connected to the Ethernet PHY reset pin, then you
should describe it in the dts and also provide a delay as per the
AR803X datasheet.
Regards,
Fabio Estevam
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