lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <AM5PR1001MB099467ACADA4F7B6DDA5087480440@AM5PR1001MB0994.EURPRD10.PROD.OUTLOOK.COM>
Date:   Wed, 27 Nov 2019 16:33:12 +0000
From:   Adam Thomson <Adam.Thomson.Opensource@...semi.com>
To:     Mark Brown <broonie@...nel.org>,
        Adam Thomson <Adam.Thomson.Opensource@...semi.com>
CC:     Sebastian Reichel <sebastian.reichel@...labora.com>,
        Support Opensource <Support.Opensource@...semi.com>,
        Liam Girdwood <lgirdwood@...il.com>,
        Jaroslav Kysela <perex@...ex.cz>,
        Takashi Iwai <tiwai@...e.com>,
        "alsa-devel@...a-project.org" <alsa-devel@...a-project.org>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        "kernel@...labora.com" <kernel@...labora.com>
Subject: RE: [PATCHv2 6/6] ASoC: da7213: Add default clock handling

On 27 November 2019 15:41, Mark Brown wrote:

> On Wed, Nov 27, 2019 at 01:42:54PM +0000, Adam Thomson wrote:
> 
> > nicest solution here though. I guess we're stuck with people having to manually
> > configure the PLL for bypass when a non-generic machine driver inits, to avoid
> > the initial double config, as I don't see other options unless you have
> > something to specify at init that it's auto or manual, and this doesn't feel
> > like a DT device specific property thing as it's more software than hardware.
> > At least Sebastian's patch has a good comment block to highlight this.
> 
> Not sure I follow here - if we're configuring the PLL explicitly then
> I'd expect the PLL to be configured first, then the SYSCLK, so I'd
> expect that the automatic PLL configuration wouldn't kick in.

The PLL in the codec relies on MCLK. The MCLK rate can be specified/configured
by a machine driver using the relevant codec sysclk function, as is done in a
number of drivers. Surely that has to happen first before we configure the PLL
as the PLL functions needs to know what rate is coming in so the correct
dividers can be applied for the required internal clocking to match up with the
desired sample rates. I guess I'm still missing something regarding your
discussion around SYSCLK?

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ