linux-kernel - Re: MIPS: bug: gettimeofday syscall broken on CI20 board

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Message-Id: <2966D06E-C754-4807-A48E-02D476EF1A24@goldelico.com>
Date:   Thu, 28 Nov 2019 13:16:57 +0100
From:   "H. Nikolaus Schaller" <hns@...delico.com>
To:     Vincenzo Frascino <vincenzo.frascino@....com>
Cc:     linux-mips@...r.kernel.org, Ralf Baechle <ralf@...ux-mips.org>,
        Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
        Paul Burton <paul.burton@...s.com>,
        MIPS Creator CI20 Development 
        <mips-creator-ci20-dev@...glegroups.com>,
        Discussions about the Letux Kernel 
        <letux-kernel@...nphoenux.org>
Subject: Re: MIPS: bug: gettimeofday syscall broken on CI20 board


> Am 28.11.2019 um 13:05 schrieb Vincenzo Frascino <vincenzo.frascino@....com>:
> 
> Hi Nikolaus,
> 
> On 27/11/2019 14:29, H. Nikolaus Schaller wrote:
>> Hi Vincenco,
>> 
> [...]
> 
>>> 
>>> a) with 5.4 kernel
>>> 
> 
> Could you please report the hash of your top commit?

We have our own config and some compile fixes. But the base
commit is 219d54332a09

> 
> [...]
> 
>> 
>> root@...ux:~# ./gettime 
>> r = -1 errno=1
>> tv.sec = 1
>> tv.usec = 1
>> rt = 1478193516 errno=1
>> t = 1478193516
>> root@...ux:~# 
>> 
> 
> On arm64 the output of your application is what follows:
> 
> r = 0 errno=0
> tv.sec = 1574942449
> tv.usec = 348684
> rt = 1574942449 errno=0
> t = 1574942449
> 
> Which seems what it is expected.

Indeed. Well, on all other arm architectures I can test (omap3/4/5, imx6, raspi)
it is correct. Only on mips jz4780 I see this.

> 
> On a previous email you mentioned what follows:
> 
> root@...ux:~# cat /proc/cpuinfo
> system type             : JZ4780
> machine                 : img,ci20
> processor               : 0
> cpu model               : Ingenic JZRISC V4.15  FPU V0.0
> BogoMIPS                : 1196.85
> wait instruction        : yes
> microsecond timers      : no
> tlb_entries             : 32
> extra interrupt vector  : yes
> hardware watchpoint     : yes, count: 1, address/irw mask: [0x0fff]
> isa                     : mips1 mips2 mips32r1 mips32r2
> ASEs implemented        :
> shadow register sets    : 1
> kscratch registers      : 0
> package                 : 0
> core                    : 0
> VCED exceptions         : not available
> VCEI exceptions         : not available
> 
> I am not familiar with JZ4780, which HW clock is it using? (R4K, GIC or NONE)?

Ah, good question. How do I find out? Checking defconfig did not show any
config with R4K or GIC. So it is likely NONE. CONFIG_RTC_DRV_JZ4740=y if that
helps.

BR and thanks,
Nikolaus